Systems and methods for generating soft information in NAND flash

• US 8,681,564 B2
• Filed: 05/22/2012
• Issued: 03/25/2014
• Est. Priority Date: 05/23/2011
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: Marvell World Trade Limited (Marvell Technology Group Limited)
• Inventors: Chen, Zhengang, Burd, Gregory, Chilappagari, Shashi Kiran, Yang, Xueshi
• Primary Examiner(s): NGUYEN, TAN
• Application Number:
  US13/477,678
• Publication Number:
  US 20120300545A1
• Time in Patent Office: 672 Days
• Field of Search: None
• US Class Current: 365/185.2
• CPC Class Codes: G06F 11/1048 using arrangements adapted for a specific error detection or correction feature
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/06 Auxiliary circuits, e.g. for writing into memory
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/34 Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
• CPC Class Codes: G11C 16/3427 Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written

Abstract

Systems and methods are provided to generate soft information related to the threshold voltage of a memory cell. A range of threshold voltages for the memory cell is divided into subregions of threshold voltage values herein referred to as bins. An output of the memory cell in response to an applied reference signal is measured. The applied reference signal includes a voltage value and position information. A single bin is identified based on the position information of the reference signal. The identified bin is split into more than one bin based on the output of the memory cell and the voltage value of the reference signal. The newly split bins and all the other bins that were not split are assigned new bin indices.

Claims

1. A method for generating soft information for a memory cell, the method comprising:

measuring an output of the memory cell in response to applying a reference signal, wherein the reference signal includes a voltage value and position information;

identifying a bin of a plurality of bins based on the position information of the reference signal, wherein the plurality of bins represent a range of threshold voltages for the memory cell;

splitting the identified bin into at least two bins based on the output of the memory cell and the voltage value of the reference signal; and

assigning the identified bin, the plurality of bins, and the at least two bins respective indices.

2. The method of claim 1, wherein the position information of the reference signal includes a relative position of the reference signal with respect to previously applied reference signals.

3. The method of claim 1, wherein the position information of the reference signal is an index of a bin that includes the voltage value of the reference signal.

4. The method of claim 1, further comprising transmitting the reference signal from a reference voltage control unit to a bin index generation unit.

5. The method of claim 1, wherein measuring the output of the memory cell comprises applying the reference signal to the memory cell, issuing a read command to the memory cell, and reading a stored bit in the memory cell.

6. The method of claim 1, further comprising determining a boundary of the plurality of bins to be split based on the voltage value of the reference signal.

7. The method of claim 1, wherein the at least two bins are assigned an index based on the measured output of the memory cell.

8. The method of claim 1, wherein a subset of bins of the plurality of bins that are not split are assigned a new index.

9. The method of claim 1, further comprising detecting an invalid measured output of the memory cell, and assigning a new index to a subset of bins of the plurality of bins that are not split independent of the measured output'"'"'s validity.

10. The method of claim 1, wherein the identified bin, the plurality of bins, and the at least two bins are the assigned bin indices such that the bin indices are arranged in a numerically increasing order.

11. A system for generating soft information for a memory cell, the system comprising:

control circuitry configured to;

measure an output of the memory cell in response to applying a reference signal, wherein the reference signal includes a voltage value and position information;

identify a bin of a plurality of bins based on the position information of the reference signal, wherein the plurality of bins represent a range of threshold voltages for the memory cell;

split the identified bin into at least two bins based on the output of the memory cell and the voltage value of the reference signal; and

assign the identified bin, the plurality of bins, and the at least two bins respective indices.

12. The system of claim 11, wherein the position information of the reference signal includes a relative position of the reference signal with respect to previously applied reference signals.

13. The system of claim 11, wherein the position information of the reference signal is an index of a bin that includes the voltage value of the reference signal.

14. The system of claim 11, wherein a reference voltage control unit transmits the reference signal to the bin index generation unit.

15. The system of claim 11, wherein the control circuitry is further configured to:

apply the reference signal to the memory cell;

issue a read command to the memory cell; and

read a stored bit in the memory cell.

16. The system of claim 11, wherein the control circuitry is further configured to determine a boundary of the plurality of bins to be split based on the voltage value of the reference signal.

17. The system of claim 11, wherein the at least two bins are assigned an index based on the measured output of the memory cell.

18. The system of claim 11, wherein a subset of bins of the plurality of bins that are not split are assigned a new index.

19. The system of claim 11, wherein the control circuitry is further configured to detect an invalid measured output of the memory cell and assign a new index to a subset of bins of the plurality of bins that are not split independent of the measured output'"'"'s validity.

20. The system of claim 11, wherein the identified bin, the plurality of bins, and the at least two bins are assigned the bin indices such that the bin indices are arranged in a numerically increasing order.