Linear system for link training

• US 8,681,848 B2
• Filed: 10/28/2011
• Issued: 03/25/2014
• Est. Priority Date: 10/28/2011
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments Deutschland Gesellschaft Mit Beschrã¤Nkter Haftung (Texas Instruments, Inc.), Texas Instruments, Inc.
• Inventors: Hu, Yaqi, Fan, Yanli, Jin, Huawen, Schacht, Ulrich, Muth, Karl, Morgan, Mark W.
• Primary Examiner(s): Corrielus, Jean B
• Application Number:
  US13/284,690
• Publication Number:
  US 20130107933A1
• Time in Patent Office: 879 Days
• Field of Search: 375229-230, 375/232, 375/233, 375259-260, 375/345, 375/350, 333/18, 333/28.R, 330/124.R, 330/304, 708/300, 708/322, 708/323
• US Class Current: 375/229
• CPC Class Codes: H04L 27/01 Equalisers baseband equalizers at the transmitter end H04L25/03343; in analogue transmission systems H04B3/04, H04B7/005

Abstract

An apparatus for equalizing channels is provided, which is generally transparent to link training. The apparatus generally includes equalization paths formed by an input circuit, a crossbar, and an output circuit and a controller. Each equalization path is coupled to at least one of the channels, and a controller has a VGA loop, a crossbar loop, and a driver loop. The AGC loop receives a first reference voltage and provides a gain control signal to the input circuit, and the gain control network comprises a replica of at least one of the equalization paths. The crossbar loop receives a second reference voltage and provides a crossbar control signal to the crossbar. The driver loop receives a third reference voltage and provides a driver control signal for the output circuit.

Claims

1. An apparatus for equalizing a plurality of channels that is generally transparent to link training, the apparatus comprising:

a plurality of equalization paths formed by an input circuit, a crossbar, and an output circuit, wherein each equalization path is coupled to at least one of the channels and wherein the crossbar is connected between the input circuit and the output circuit; and

a controller having;

a gain control loop that receives a first reference voltage and that provides a gain control signal to the input circuit, wherein the gain control loop includes a replica of at least one of the equalization paths;

a crossbar loop that receives a second reference voltage and that provides a crossbar control signal to the crossbar; and

a driver loop that receives a third reference voltage and that provides a driver control signal for the output circuit.

2. The apparatus of claim 1, wherein the input circuit comprises a plurality of variable gain amplifiers (VGAs), wherein each VGA is coupled to at least one of the channels and is coupled to the crossbar.

3. The apparatus of claim 2, wherein the output circuit comprises a plurality of drivers that are each coupled to the crossbar.

4. The apparatus of claim 3, wherein the crossbar comprises a plurality multiplexers wherein each multiplexer is coupled to each VGA and is coupled to at least one of the drivers.

5. The apparatus of claim 4, wherein the gain control loop further comprises:

a replica VGA that receives the first reference voltage;

a replica multiplexer that is coupled to the replica VGA;

a replica driver that is coupled to the replica multiplexer; and

a control network that receives the first reference voltage, that is coupled to the replica driver, and that is coupled to each VGA of the input circuit.

6. The apparatus of claim 5, wherein the replica multiplexer further comprises a first replica multiplexer, and wherein the control network further comprises a first control network, and wherein the crossbar loop further comprises:

a second replica multiplexer receives the second reference voltage; and

a second control network that receives the second reference voltage, that is coupled to the second replica multiplexer, and that is coupled to each multiplexer of the crossbar.

7. The apparatus of claim 6, wherein the driver loop further comprises:

a second replica driver receives the third reference voltage; and

a third control network that receives the third reference voltage, that is coupled to the second replica driver, and that is coupled to each driver of the output circuit.

8. The apparatus of claim 7, wherein each of the first, second, and third control networks further comprise:

a first voltage divider that receives receive one of the first, second, and third reference voltages;

a second voltage divider is coupled to one of the first replica driver, the second replica multiplexer, and the second replica driver; and

a control signal generator that is coupled between the first and second voltage dividers.

9. The apparatus of claim 8, wherein the control signal generator further comprises:

a difference amplifier that is coupled to each of the first and second voltage dividers;

a filter that is coupled to the difference amplifier;

a voltage-to-current (V2I) converter that is coupled to the filter; and

a current mirror circuit that is coupled to the V2I converter.

10. An apparatus comprising:

a transmitter having a plurality of channels;

a transmission medium that is coupled to the transmitter;

a receiver that is coupled to the transmission medium, wherein the receiver includes a linear equalizer that equalizes the plurality of channels and that is generally transparent to link training, and wherein the linear equalizer includes;

a plurality of equalization paths formed by an input circuit, a crossbar, and an output circuit, wherein each equalization path is coupled to at least one of the channels and wherein the crossbar is connected between the input circuit and the output circuit and

a controller having;

a gain control loop that receives a first reference voltage and that provides a gain control signal to the input circuit, wherein the gain control loop includes a replica of at least one of the equalization paths;

a crossbar loop that receives a second reference voltage and that provides a crossbar control signal to the crossbar; and

a driver loop that receives a third reference voltage and that provides a driver control signal for the output circuit.

11. The apparatus of claim 10, wherein the input circuit comprises a plurality of variable gain amplifiers (VGAs), wherein each VGA is coupled to at least one of the channels and is coupled to the crossbar.

12. The apparatus of claim 11, wherein the output circuit comprises a plurality of drivers that are each coupled to the crossbar.

13. The apparatus of claim 12, wherein the crossbar comprises a plurality multiplexers wherein each multiplexer is coupled to each VGA and is coupled to at least one of the drivers.

14. The apparatus of claim 13, wherein the gain control loop further comprises:

a replica VGA that receives the first reference voltage;

a replica multiplexer that is coupled to the replica VGA;

a replica driver that is coupled to the replica multiplexer; and

a control network that receives the first reference voltage, that is coupled to the replica driver, and that is coupled to each VGA of the input circuit.

15. The apparatus of claim 14, wherein the replica multiplexer further comprises a first replica multiplexer, and wherein the control network further comprises a first control network, and wherein the crossbar loop further comprises:

a second replica multiplexer receives the second reference voltage; and

a second control network that receives the second reference voltage, that is coupled to the second replica multiplexer, and that is coupled to each multiplexer of the crossbar.

16. The apparatus of claim 15, wherein the driver loop further comprises:

a second replica driver receives the third reference voltage; and

a third control network that receives the third reference voltage, that is coupled to the second replica driver, and that is coupled to each driver of the output circuit.

17. The apparatus of claim 16, wherein each of the first, second, and third control networks further comprise:

a first voltage divider that receives receive one of the first, second, and third reference voltages;

a second voltage divider is coupled to one of the first replica driver, the second replica multiplexer, and the second replica driver; and

a control signal generator that is coupled between the first and second voltage dividers.

18. The apparatus of claim 17, wherein the control signal generator further comprises:

a difference amplifier that is coupled to each of the first and second voltage dividers;

a filter that is coupled to the difference amplifier;

a voltage-to-current (V2I) converter that is coupled to the filter; and

a current mirror circuit that is coupled to the V2I converter.

19. The apparatus of claim 18, wherein the receiver further comprises a decision feedback equalizer (DFE), and wherein the linear equalizer is coupled between the transmission medium and the DFE.

20. The apparatus of claim 19, wherein the apparatus is a 10 Gigabit backplane link with scrambled encoding (10GBase-KR) compliant communication system.