Automatic virtual metrology for semiconductor wafer result prediction

• US 8,682,466 B2
• Filed: 02/05/2008
• Issued: 03/25/2014
• Est. Priority Date: 05/04/2007
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Ko, Francis, Lai, Chih-Wei, Zuo, Kewei, Lo, Henry, Wang, Jean, Chen, Ping-Hsu, Yu, Chen-Hua, Lim, Chun-Hsien
• Primary Examiner(s): Padmanabhan, Kavita
• Assistant Examiner(s): LOPEZ ALVAREZ, OLVIN
• Application Number:
  US12/025,933
• Publication Number:
  US 20080275586A1
• Time in Patent Office: 2,240 Days
• Field of Search: 706/62, 700/110
• US Class Current: 700/110
• CPC Class Codes: G05B 23/0221 Preprocessing measurements, e.g. data collection rate adjustment; Standardization of measurements; Time series or signal analysis, e.g. frequency analysis or wavelets; Trustworthiness of measurements; Indexes therefor; Measurements using easily measured parameters to estimate parameters difficult to measure; Virtual sensor creation; De-noising; Sensor fusion; Unconventional preprocessing inherently present in specific fault detection methods like PCA-based methods

Abstract

A method to enable wafer result prediction includes collecting manufacturing data from various semiconductor manufacturing tools and metrology tools; choosing key parameters using an autokey method based on the manufacturing data; building a virtual metrology based on the key parameters; and predicting wafer results using the virtual metrology.

Claims

1. A method for semiconductor wafer result prediction, comprising using software and hardware to perform:

collecting manufacturing data, including processing tool data from at least one semiconductor manufacturing tool and product data from at least one metrology tool, wherein the product data are collected from at least one actual wafer that has been processed by the at least one semiconductor manufacturing tool and the processing tool data are associated with at least one setting parameter of the semiconductor manufacturing tool during fabrication of the at least one actual wafer;

choosing key parameters using an autokey analysis based on the manufacturing data, wherein the autokey analysis includes;

grouping a plurality of processing parameters by a hierarchical clustering method using respective correlation distances, wherein the grouping groups together parameters of the plurality of processing parameters with respective correlation distances below a cut-off point to form a representative parameter; and

selecting the representative parameter as one of the key parameters based on a correlation distance for the representative parameter;

building a virtual metrology based on the key parameters to produce at least one virtual parameter, wherein the virtual metrology comprises;

accepting the manufacturing data as a first input and outputting physical parameters; and

accepting the physical parameters as a second input and outputting electrical parameters; and

predicting wafer results using the at least one virtual parameter, wherein the predicting is performed with respect to the at least one actual wafer that has been processed by the at least one semiconductor manufacturing tool.

2. The method of claim 1, wherein choosing the key parameters comprises using a correlation distance as a selection threshold.

3. The method of claim 1, wherein choosing the key parameters comprises selecting key steps.

4. The method of claim 1, wherein the manufacturing data comprises fault detection and classification (FDC) data.

5. The method of claim 4, wherein choosing the key parameters comprises:

collecting time series data for manufacturing parameters from the FDC data;

transferring the time series data into summarized data; and

performing the autokey analysis on the summarized data to choose the key parameters.

6. The method of claim 5, wherein the summarized data are selected from a group consisting of an average value, a maximum value, a minimum value, a standard deviation, and combinations thereof.

7. The method of claim 5, wherein the manufacturing data comprises active parameters and passive parameters.

8. The method of claim 1, wherein the key parameters are a function of a subset of the manufacturing data.

9. The method of claim 1, wherein one of the key parameters is associated with a root cause of wafer fault.

10. The method of claim 1, wherein the collecting of the manufacturing data further comprising:

defining good data and bad fault detection and classification (FDC) data from the manufacturing data;

enhancing abnormal tool parameter capture rate by performing a pretreatment to the good and bad data; and

performing self classification analysis based on n-sigma deviation between the good data and bad data.

11. The method of claim 1 further comprising discarding the at least one actual wafer when the at least one actual wafer fails a virtual final wafer acceptance test.

12. The method of claim 1,

wherein the autokey analysis further includes determining a linear combination of the grouped parameters of the representative parameter, and

wherein the selecting of the representative parameter as one of the key parameters is further based on a correlation distance for the linear combination.

13. A wafer result prediction system, comprising:

a first collection mechanism to collect processing tool data from a semiconductor manufacturing tool, wherein the processing tool data are associated with one or more setting parameters of the semiconductor manufacturing tool during fabrication of a semiconductor wafer;

a second collection mechanism to collect product data from the semiconductor wafer;

a key parameter identification mechanism that;

groups together parameters of the one or more setting parameters with respective correlation distances below a cut-off point to form a representative parameter, wherein the representative parameter is a linear combination of the grouped parameters; and

selects the representative parameter as a key parameter based on a correlation distance for the representative parameter;

a virtual metrology mechanism that;

determines physical parameters of the semiconductor wafer based on the processing tool data and the product data; and

determines electrical parameters based on the physical parameters, the processing tool data, and the product data; and

a wafer results predicting mechanism for receiving the electrical and physical parameters and predicting whether the semiconductor wafer that is currently undergoing fabrication meets one or more predetermined criteria,

wherein at least one of the first collection mechanism, the second collection mechanism, the key parameter identification mechanism, the virtual metrology mechanism, and the wafer results predicting mechanism includes software and hardware.

14. The wafer result prediction system of claim 13, wherein the wafer results predicting mechanism further comprises an evaluation module to value the electrical parameters for wafer acceptance according to the predefined criteria.

15. A system for wafer result prediction, comprising:

a data collector designed for collecting manufacturing data, the manufacturing data including tool data from processing tools and wafer data from metrology tools, wherein the tool data are associated with settings of semiconductor fabrication tools and the wafer data are associated with measurements made on an actual wafer having undergone semiconductor fabrication processing;

a key parameter module designed for identifying key parameters based on a correlation distance between process parameters and device parameters, wherein the key parameter module is operable to;

group together parameters of the process parameters with respective correlation distances below a cut-off point to form representative parameters; and

select one of the representative parameters as one of the key parameters when a correlation distance between the one of the representative parameters and a device parameter meets a threshold criteria;

a virtual metrology module constructed based on the key parameters, wherein the virtual metrology module is operable to;

accept the manufacturing data as input and return physical parameters as output; and

thereafter accept the physical parameters as input and return electrical parameters as output; and

a prediction module designed for predicting wafer results for the actual wafer having undergone semiconductor fabrication processing by utilizing the virtual metrology module,

wherein at least one of the data collector, the key parameter module, the virtual metrology module, and the prediction module includes software and hardware to implement a function thereof.

16. The system of claim 15, wherein the key parameter module is designed to identify the key parameters using a hierarchical clustering method.

17. The system of claim 15, wherein each of the representative parameters includes a linear combination of the grouped parameters of the process parameters.