Method for manufacturing thin film integrated circuit, and element substrate

• US 8,685,835 B2
• Filed: 05/05/2011
• Issued: 04/01/2014
• Est. Priority Date: 02/06/2004
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Dairiki, Koji
• Primary Examiner(s): Fan, Michele
• Application Number:
  US13/101,400
• Publication Number:
  US 20110212575A1
• Time in Patent Office: 1,062 Days
• Field of Search: 438/455, 438/458, 438/149, 438/151, 438/164, 257/E21.599
• US Class Current: 438/458
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: G06K 19/07758 arrangements for adhering the record carrier to further objects or living beings, functioning as an identification tag
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/02425 Conductive materials, e.g. metallic silicides
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02505 consisting of more than two layers
• CPC Class Codes: H01L 21/02592 amorphous
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 21/02672 using crystallisation enhancing elements
• CPC Class Codes: H01L 21/02675 using laser beams
• CPC Class Codes: H01L 21/02678 Beam shaping, e.g. using a mask
• CPC Class Codes: H01L 21/02683 Continuous wave laser beam
• CPC Class Codes: H01L 21/02686 Pulsed laser beam
• CPC Class Codes: H01L 21/02691 Scanning of a beam
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1266 the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 27/13 combined with thin-film or thick-film passive components
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate

Abstract

Applications and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of being produced at a lower cost. In view of the above described object, one feature of the invention is to provide the steps of forming a separation layer over an insulating substrate and forming a thin film integrated circuit having a semiconductor film of as an active region over the separation layer, wherein the thin film integrated circuit is not separated. In the case of using an insulating substrate, there is less limitation on the shape of the mother substrate when compared to a case of taking a chip out of a circular silicon wafer. Accordingly, reduction in cost of an IC chip can be achieved.

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming a separation layer over a first substrate;

forming a first transistor and a second transistor over the separation layer;

forming an insulating film over the first transistor, the second transistor, and the separation layer;

selectively etching the insulating film, and forming a groove between the first transistor and the second transistor to expose the separation layer;

attaching a second substrate having an opening so that the opening is overlapped with the groove, wherein the second substrate is provided with an antenna; and

separating the first substrate from the first transistor and the second transistor by introducing an etchant into the opening and removing the separation layer.

2. The method for manufacturing a semiconductor device according to claim 1,

wherein the first transistor is included in a first device, and

wherein the second transistor is included in a second device.

3. The method for manufacturing a semiconductor device according to claim 2,

wherein each of the first device and the second device is an integrated circuit chip.

4. The method for manufacturing a semiconductor device according to claim 1,

wherein the etchant is a gas or a liquid including CIF₃.

5. The method for manufacturing a semiconductor device according to claim 1,

wherein the separation layer is an amorphous semiconductor, a semi-amorphous semiconductor, a microcrystalline semiconductor, or a crystalline semiconductor.

6. The method for manufacturing a semiconductor device according to claim 1,

wherein each of the first transistor and the second transistor includes a semiconductor film having a hydrogen concentration of 1×

10¹⁹/cm³ to 5×

10²⁰/cm³.

7. A method for manufacturing a semiconductor device, comprising the steps of:

forming a separation layer over a first substrate;

forming a first chip including a first transistor and a second chip including a second transistor over the separation layer;

forming an insulating film over the first transistor, the second transistor, and the separation layer;

selectively etching the insulating film, and forming a groove between the first chip and the second chip to expose the separation layer;

attaching a second substrate having an opening so that the opening is overlapped with the groove, wherein the second substrate is provided with an antenna;

separating the first substrate from the first chip and the second chip by introducing an etchant into the opening and removing the separation layer; and

cutting the second substrate to separate the first chip from the second chip.

8. The method for manufacturing a semiconductor device according to claim 7,

wherein each of the first chip and the second chip is an integrated circuit chip.

9. The method for manufacturing a semiconductor device according to claim 7,

wherein the etchant is a gas or a liquid including CIF₃.

10. The method for manufacturing a semiconductor device according to claim 7,

wherein the separation layer is an amorphous semiconductor, a semi-amorphous semiconductor, a microcrystalline semiconductor, or a crystalline semiconductor.

11. The method for manufacturing a semiconductor device according to claim 7,

wherein each of the first transistor and the second transistor includes a semiconductor film having a hydrogen concentration of 1×

10¹⁹/cm³ to 5×

10²⁰/cm³.