Method for manufacturing semiconductor device

• US 8,686,425 B2
• Filed: 08/14/2012
• Issued: 04/01/2014
• Est. Priority Date: 12/28/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Hirohashi, Takuya, Takahashi, Masahiro, Shimazu, Takashi
• Primary Examiner(s): Lee, Hsien Ming
• Application Number:
  US13/584,840
• Publication Number:
  US 20120305913A1
• Time in Patent Office: 595 Days
• Field of Search: 438/149, 438/150, 438/154, 438/187, 438/198, 438/285, 438/308, 438/104, 257/57, 257/69, 257/213, 257/E29.296, 257/E29.273, 257/E21.09, 257/E29.068
• US Class Current: 257/69
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/02472 Oxides
• CPC Class Codes: H01L 21/02483 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02502 consisting of two layers
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A first multi-component oxide semiconductor layer is formed over a substrate and a single-component oxide semiconductor layer is formed thereover; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500° C. to 1000° C. inclusive, preferably 550° C. to 750° C. inclusive so that a first multi-component oxide semiconductor layer including single crystal regions and a single-component oxide semiconductor layer including single crystal regions are formed; and a second multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions.

Claims

1. A semiconductor device comprising:

a substrate; and

a transistor over the substrate, the transistor comprising;

a gate electrode;

an oxide semiconductor layer including a channel; and

a gate insulating film interposed between the gate electrode and the oxide semiconductor layer,

wherein the oxide semiconductor layer includes;

a first oxide semiconductor layer including a first crystalline region;

a second oxide semiconductor layer including a second crystalline region, the second oxide semiconductor layer being over the first oxide semiconductor layer; and

a third oxide semiconductor layer including a third crystalline region, the third oxide semiconductor layer being over the second oxide semiconductor layer,

wherein the second crystalline region includes a first crystal,

wherein the third crystalline region includes a second crystal, and

wherein each of a c-axis of the first crystal and a c-axis of the second crystal is aligned substantially perpendicular to a surface of the substrate.

2. The semiconductor device according to claim 1,

wherein the gate electrode is located over or below the oxide semiconductor layer.

3. The semiconductor device according to claim 2, further comprising a first transistor below the transistor,

wherein a first channel of the first transistor includes silicon.

4. The semiconductor device according to claim 1,

wherein the transistor further comprises an oxide insulating layer over and in contact with the oxide semiconductor layer.

5. The semiconductor device according to claim 1,

wherein each of the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer includes a zinc, and

wherein a component ratio of zinc in the first oxide semiconductor layer is different from a component ratio of zinc in the second oxide semiconductor layer.

6. The semiconductor device according to claim 1,

wherein the second oxide semiconductor layer is formed of zinc oxide.

7. The semiconductor device according to claim 1,

wherein each of the first oxide semiconductor layer and the third oxide semiconductor layer includes at least one of indium, gallium, tin, aluminum, magnesium, and zinc.

8. The semiconductor device according to claim 1,

wherein a thickness of the second oxide semiconductor layer is thinner than that of the third oxide semiconductor layer.

9. The semiconductor device according to claim 1,

wherein the first crystalline region includes a third crystal whose c-axis is aligned substantially perpendicular to the surface of the substrate.

10. The semiconductor device according to claim 9,

wherein at least one of the first crystalline region, the second crystalline region, and the third crystalline region comprises a single crystalline region.

11. A semiconductor device comprising:

a substrate; and

a transistor over the substrate, the transistor comprising;

a gate electrode;

an oxide semiconductor layer including a channel; and

a gate insulating film interposed between the gate electrode and the oxide semiconductor layer,

wherein the oxide semiconductor layer includes;

a first oxide semiconductor layer including a first crystalline region;

a second oxide semiconductor layer including a second crystalline region, the second oxide semiconductor layer being over the first oxide semiconductor layer; and

a third oxide semiconductor layer including a third crystalline region, the third oxide semiconductor layer being over the second oxide semiconductor layer,

wherein the second crystalline region includes a first crystal,

wherein the third crystalline region includes a second crystal,

wherein each of a c-axis of the first crystal and a c-axis of the second crystal is aligned substantially perpendicular to a surface of the substrate, and

wherein a component of the first oxide semiconductor layer is different from a component of the second oxide semiconductor layer.

12. The semiconductor device according to claim 11,

wherein the gate electrode is located over or below the oxide semiconductor layer.

13. The semiconductor device according to claim 12, further comprising a first transistor below the transistor,

wherein a first channel of the first transistor includes silicon.

14. The semiconductor device according to claim 11,

wherein the transistor further comprises an oxide insulating layer over and in contact with the oxide semiconductor layer.

15. The semiconductor device according to claim 11,

wherein each of the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer includes a zinc, and

wherein a component ratio of zinc in the first oxide semiconductor layer is different from a component ratio of zinc in the second oxide semiconductor layer.

16. The semiconductor device according to claim 11,

wherein the second oxide semiconductor layer is formed of zinc oxide.

17. The semiconductor device according to claim 11,

wherein each of the first oxide semiconductor layer and the third oxide semiconductor layer includes at least one of indium, gallium, tin, aluminum, magnesium, and zinc.

18. The semiconductor device according to claim 11,

wherein a thickness of the second oxide semiconductor layer is thinner than that of the third oxide semiconductor layer.

19. The semiconductor device according to claim 11,

wherein the first crystalline region includes a third crystal whose c-axis is aligned substantially perpendicular to the surface of the substrate.

20. The semiconductor device according to claim 19,

wherein at least one of the first crystalline region, the second crystalline region, and the third crystalline region comprises a single crystalline region.

21. A semiconductor device comprising:

a substrate; and

a transistor over the substrate, the transistor comprising;

a first gate electrode;

a gate insulating film over the first gate electrode;

an oxide semiconductor layer including a channel over the gate insulating film; and

a second gate electrode over the oxide semiconductor layer,

wherein the oxide semiconductor layer includes;

a first oxide semiconductor layer including a first crystalline region;

a second oxide semiconductor layer including a second crystalline region, the second oxide semiconductor layer being over the first oxide semiconductor layer; and

a third oxide semiconductor layer including a third crystalline region, the third oxide semiconductor layer being over the second oxide semiconductor layer,

wherein the second crystalline region includes a first crystal,

wherein the third crystalline region includes a second crystal, and

wherein each of a c-axis of the first crystal and a c-axis of the second crystal is aligned substantially perpendicular to a surface of the substrate.

22. The semiconductor device according to claim 21,

wherein the second oxide semiconductor layer is formed of zinc oxide.

23. The semiconductor device according to claim 21,

wherein the first crystalline region includes a third crystal whose c-axis is aligned substantially perpendicular to the surface of the substrate.

24. The semiconductor device according to claim 23,

wherein at least one of the first crystalline region, the second crystalline region, and the third crystalline region comprises a single crystalline region.

25. A semiconductor device comprising:

a substrate; and

a transistor over the substrate, the transistor comprising;

a first gate electrode;

a gate insulating film over the first gate electrode;

an oxide semiconductor layer including a channel over the gate insulating film; and

a second gate electrode over the oxide semiconductor layer,

wherein the oxide semiconductor layer includes;

a first oxide semiconductor layer including a first crystalline region;

a second oxide semiconductor layer including a second crystalline region, the second oxide semiconductor layer being over the first oxide semiconductor layer; and

a third oxide semiconductor layer including a third crystalline region, the third oxide semiconductor layer being over the second oxide semiconductor layer,

wherein the second crystalline region includes a first crystal,

wherein the third crystalline region includes a second crystal,

wherein each of a c-axis of the first crystal and a c-axis of the second crystal is aligned substantially perpendicular to a surface of the substrate, and

wherein a component of the first oxide semiconductor layer is different from a component of the second oxide semiconductor layer.

26. The semiconductor device according to claim 25,

wherein the second oxide semiconductor layer is formed of zinc oxide.

27. The semiconductor device according to claim 25,

wherein the first crystalline region includes a third crystal whose c-axis is aligned substantially perpendicular to the surface of the substrate.

28. The semiconductor device according to claim 27,

wherein at least one of the first crystalline region, the second crystalline region, and the third crystalline region comprises a single crystalline region.

29. A semiconductor device comprising:

a substrate; and

a transistor over the substrate, the transistor comprising;

a gate electrode;

a first oxide semiconductor layer;

a second oxide semiconductor layer over the first oxide semiconductor layer, the second oxide semiconductor layer comprising a crystalline region; and

a third oxide semiconductor layer over the second oxide semiconductor layer, and

a gate insulating film between the gate electrode and the first oxide semiconductor layer,

wherein the crystalline region comprises a crystal structure in which a c-axis is substantially perpendicular to a surface of the substrate.

30. The semiconductor device according to claim 29, further comprising an electrode,

wherein the electrode is in direct contact with a side surface of the second oxide semiconductor layer.

31. The semiconductor device according to claim 29, further comprising a first transistor below the transistor,

wherein a channel of the first transistor comprises silicon.

32. The semiconductor device according to claim 31, further comprising an aluminum oxide layer over and in contact with the transistor.

33. The semiconductor device according to claim 29,

wherein each of the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer comprises zinc, and

wherein a component ratio of zinc in the first oxide semiconductor layer is different from a component ratio of zinc in the second oxide semiconductor layer.

34. The semiconductor device according to claim 29,

wherein each of the first oxide semiconductor layer and the third oxide semiconductor layer comprises at least one of indium, gallium, tin, aluminum, magnesium, and zinc.

35. A semiconductor device comprising:

a substrate; and

a transistor over the substrate, the transistor comprising;

a gate electrode;

a first oxide semiconductor layer;

a second oxide semiconductor layer over the first oxide semiconductor layer, the second oxide semiconductor layer comprising a crystalline region; and

a third oxide semiconductor layer over the second oxide semiconductor layer, and

a gate insulating film between the gate electrode and the first oxide semiconductor layer,

wherein the crystalline region comprises a crystal structure in which a c-axis is substantially perpendicular to a surface of the second oxide semiconductor layer.

36. The semiconductor device according to claim 35, further comprising an electrode,

wherein the electrode is in direct contact with a side surface of the second oxide semiconductor layer.

37. The semiconductor device according to claim 35, further comprising a first transistor below the transistor,

wherein a channel of the first transistor comprises silicon.

38. The semiconductor device according to claim 37, further comprising an aluminum oxide layer over and in contact with the transistor.

39. The semiconductor device according to claim 35,

wherein each of the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer comprises zinc, and

wherein a component ratio of zinc in the first oxide semiconductor layer is different from a component ratio of zinc in the second oxide semiconductor layer.

40. The semiconductor device according to claim 35,

wherein each of the first oxide semiconductor layer and the third oxide semiconductor layer comprises at least one of indium, gallium, tin, aluminum, magnesium, and zinc.