Semiconductor device

• US 8,686,528 B2
• Filed: 01/29/2010
• Issued: 04/01/2014
• Est. Priority Date: 02/04/2009
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Takanishi, Yudai, Moriguchi, Masao
• Primary Examiner(s): Rizkallah, Kimberly
• Assistant Examiner(s): Ligai, Maria
• Application Number:
  US13/147,640
• Publication Number:
  US 20110303916A1
• Time in Patent Office: 1,523 Days
• Field of Search: 257/448, 257/E29.291, 257/E29.294, 257/E29.116, 257/E29.117, 257/E29.145, 257/E29.147, 257/E29.12, 257/E29.122, 257/E29.299, 257/E21.414, 257/E27.112, 438/159, 349/43
• US Class Current: 257/448
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate

Abstract

A semiconductor device of the present invention includes: a lower electrode (110); a contact layer (130) including a first contact layer (132), a second contact layer (134) and a third contact layer (136) overlapping with a semiconductor layer (120); and an upper electrode (140) including a first upper electrode (142), a second upper electrode (144) and a third upper electrode (146). The second contact layer (134) includes a first region (134a), and a second region (134b) separate from the first region (134a), and the second upper electrode (144) is directly in contact with the semiconductor layer (120) in a region between the first region (134a) and the second region (134b) of the second contact layer (134).

Claims

1. A semiconductor device, comprising:

a lower electrode;

an insulating layer covering the lower electrode;

a semiconductor layer provided on the insulating layer;

a contact layer including a first contact layer, a second contact layer and a third contact layer each having at least a portion thereof overlapping with the semiconductor layer; and

an upper electrode including a first upper electrode at least a part of which overlaps with the first contact layer, a second upper electrode at least a part of which overlaps with the second contact layer, and a third upper electrode at least a part of which overlaps with the third contact layer, with the second upper electrode located between the first upper electrode and the third upper electrode;

wherein

the second contact layer includes a first region, and a second region separate from the first region;

the second upper electrode is directly in contact with the semiconductor layer in a region between the first region and the second region of the second contact layer;

the first upper electrode and the third upper electrode are directly physically connected to each other;

the semiconductor layer includes a slit; and

the second contact layer is divided into the first region and the second region by the slit of the semiconductor layer.

2. The semiconductor device according to claim 1, wherein a thermal conductivity of the second upper electrode is higher than a thermal conductivity of the contact layer.

3. The semiconductor device according to claim 1, wherein the semiconductor layer includes a microcrystalline silicon film or an amorphous silicon film.

4. The semiconductor device according to claim 1, wherein the contact layer includes a silicon layer into which an impurity element is introduced.

5. The semiconductor device according to claim 1, wherein

the second upper electrode includes a first side region opposing the first upper electrode, a second side region opposing the third upper electrode, and a center region located between the first side region and the second side region;

and

the center region of the second upper electrode is directly in contact with the semiconductor layer.

6. The semiconductor device according to claim 1, wherein the second upper electrode is in contact with the insulating layer.

7. The semiconductor device according to claim 1, wherein

the first upper electrode and the third upper electrode are portions of one of a source line and a drain line;

and

the second upper electrode is a portion of the other one of the source line and the drain line.

8. A semiconductor device, comprising:

a lower electrode;

an insulating layer covering the lower electrode;

a semiconductor layer provided on the insulating layer;

a contact layer including a first contact layer, a second contact layer and a third contact layer each having at least a portion thereof overlapping with the semiconductor layer; and

an upper electrode including a first upper electrode at least a part of which overlaps with the first contact layer, a second upper electrode at least a part of which overlaps with the second contact layer, and a third upper electrode at least a part of which overlaps with the third contact layer, with the second upper electrode located between the first upper electrode and the third upper electrode;

wherein

the second contact layer includes a first region, and a second region separate from the first region;

the second upper electrode is directly in contact with the semiconductor layer in a region between the first region and the second region of the second contact layer;

the first upper electrode and the third upper electrode are directly physically connected to each other;

the second upper electrode includes a trunk portion, a first branch portion extending from the trunk portion towards the first upper electrode, and a second branch portion extending from the trunk portion towards the third upper electrode; and

the trunk portion is directly in contact with the semiconductor layer in the region between the first region and the second region of the second contact layer.

9. The semiconductor device according to claim 8, wherein

the semiconductor layer includes a first semiconductor region, and a second semiconductor region separate from the first semiconductor region;

and

at least a portion of the second upper electrode is provided in a region between the first semiconductor region and the second semiconductor region.

10. The semiconductor device according to claim 9, wherein a portion of the first contact layer and a portion of the second contact layer overlap with the first semiconductor region, and another portion of the second contact layer and the third contact layer overlap with the second semiconductor region.

11. The semiconductor device according to claim 8, wherein a thermal conductivity of the second upper electrode is higher than a thermal conductivity of the contact layer.

12. The semiconductor device according to claim 8, wherein the semiconductor layer includes a microcrystalline silicon film or an amorphous silicon film.

13. The semiconductor device according to claim 8, wherein the contact layer includes a silicon layer into which an impurity element is introduced.

14. The semiconductor device according to claim 8, wherein

the second upper electrode includes a first side region opposing the first upper electrode, a second side region opposing the third upper electrode, and a center region located between the first side region and the second side region;

and

the center region of the second upper electrode is directly in contact with the semiconductor layer.

15. The semiconductor device according to claim 8, wherein the second upper electrode is in contact with the insulating layer.

16. The semiconductor device according to claim 8, wherein

the first upper electrode and the third upper electrode are portions of one of a source line and a drain line;

and

the second upper electrode is a portion of the other one of the source line and the drain line.