Solid-state imaging apparatus and imaging system

• US 8,687,246 B2
• Filed: 06/20/2011
• Issued: 04/01/2014
• Est. Priority Date: 07/07/2010
• Status: Active Grant

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Fujimura, Masaru, Kono, Shoji, Yamashita, Yuichiro, Kikuchi, Shin, Shimizu, Shinichiro, Arishima, Yu
• Primary Examiner(s): Worku, Negussie
• Application Number:
  US13/164,158
• Publication Number:
  US 20120008177A1
• Time in Patent Office: 1,016 Days
• Field of Search: 358/474, 358/482, 358/483, 358/512, 358/513, 358/514, 348/300, 348/294, 348/296, 348/22.1, 348/301, 348/241, 348/243
• US Class Current: 358/482
• CPC Class Codes: H04N 25/60 Noise processing, e.g. detecting, correcting, reducing or removing noise
• CPC Class Codes: H04N 25/616 involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling
• CPC Class Codes: H04N 25/65 applied to reset noise, e.g. KTC noise related to CMOS structures by techniques other than CDS
• CPC Class Codes: H04N 25/77 Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
• CPC Class Codes: H04N 25/771 comprising storage means other than floating diffusion
• CPC Class Codes: H04N 5/32 Transforming X-rays cameras or camera modules for generating image signals from X-rays H04N23/30; circuitry of SSIS for transforming X-rays into image signals H04N25/30

Abstract

A solid-state imaging apparatus includes a pixel array in which a plurality of unit cells are arranged to form a plurality of rows and a plurality of columns, wherein each of the plurality of unit cells includes a pixel, and the pixel comprising a photoelectric conversion element and an in-pixel readout circuit which outputs a signal corresponding to charges generated in the photoelectric conversion element, power is supplied to the plurality of unit cells via a power supply line and a ground line, and at least one of the plurality of unit cells includes at least a part of a capacitive element having a first electrode connected to the power supply line and a second electrode connected to the ground line.

Claims

1. A solid-state imaging apparatus having a pixel array in which a plurality of unit cells are arranged to form a plurality of rows and a plurality of columns,

each of the plurality of unit cells comprising a pixel, and the pixel comprising a photoelectric conversion element and an in-pixel readout circuit which outputs a signal corresponding to charges generated in the photoelectric conversion element,

wherein power is supplied to the plurality of unit cells via a power supply line and a ground line, and

at least one of the plurality of unit cells includes at least a part of a capacitive element having a first electrode connected to the power supply line and a second electrode connected to the ground line.

2. The apparatus according to claim 1, wherein

each of the unit cells which form at least one column of the pixel array includes at least a part of a unit vertical scanning circuit, and a set of the unit vertical scanning circuits forms a vertical scanning circuit configured to scan the plurality of rows, and

the plurality of unit cells include a unit cell including at least a part of the unit vertical scanning circuit and at least a part of the capacitive element.

3. The apparatus according to claim 1, wherein

each of the unit cells which form at least one row of the pixel array includes at least a part of a unit horizontal scanning circuit, and a set of the unit horizontal scanning circuits forms a horizontal scanning circuit configured to scan the plurality of columns, and

the plurality of unit cells include a unit cell including at least a part of the unit horizontal scanning circuit and at least a part of the capacitive element.

4. The apparatus according to claim 1, wherein

the pixel array comprises a plurality of column signal lines to be driven by the pixels, and a horizontal signal line to be connected to a selected one of the plurality of column signal lines, and

the plurality of unit cells include a unit cell including at least a part of an output amplifier which amplifies a signal output to the horizontal signal line and at least a part of the capacitive element.

5. The apparatus according to claim 1, wherein

the pixel array comprises a plurality of column signal lines to be driven by the pixels of the unit cells,

each of the unit cells which form one of the plurality of columns of the pixel array includes at least a part of a unit vertical scanning circuit, and a set of the unit vertical scanning circuits forms a vertical scanning circuit configured to scan the plurality of rows,

each of the unit cells which form one of the plurality of rows of the pixel array includes at least a part of a unit horizontal scanning circuit, and a set of the unit horizontal scanning circuits forms a horizontal scanning circuit configured to scan the plurality of columns so as to sequentially connect the plurality of column signal lines to a horizontal signal line, and

the plurality of unit cells include

a unit cell in which the capacitive element is not arranged, and at least a part of at least one of the unit vertical scanning circuit, the unit horizontal scanning circuit, and an output amplifier which amplifies a signal output to the horizontal signal line is arranged, and

a unit cell in which none of the unit vertical scanning circuit, the unit horizontal scanning circuit, and the output amplifier is arranged, and at least a part of the capacitive element is arranged.

6. An imaging system comprising:

a solid-state imaging apparatus defined in claim 1; and

a processor which processes a signal output from the solid-state imaging apparatus.

7. The apparatus according to claim 1, wherein one of the first electrode and the second electrode includes an impurity region in a semiconductor substrate, and the other one of the first electrode and the second electrode includes a polysilicon electrode, and

wherein the capacitive element further comprises an oxide film arranged between the impurity region and the polysilicon electrode.

8. The apparatus according to claim 1, wherein the capacitive element comprises:

a semiconductor layer of a first conductivity type, and

an impurity region of a second conductivity type arranged to form a junction with the semiconductor layer, and

wherein one of the first electrode and the second electrode includes a first contact region of the first conductivity type configured to supply bias to the semiconductor layer, and the other one of the first electrode and the second electrode includes a second contact region of the second conductivity type configured to supply bias to the impurity region.

9. The apparatus according to claim 1, further comprising:

a scintillator configured to convert radiation into visible light,

wherein the photoelectric conversion element generates the charges based on the visible light from the scintillator.

10. An X-ray diagnostic system comprising:

a solid-state imaging apparatus defined in claim 9; and

a processor which processes a signal output from the solid-state imaging apparatus.