Method and apparatus for symbol timing recovery

• US 8,687,747 B2
• Filed: 05/28/2010
• Issued: 04/01/2014
• Est. Priority Date: 05/29/2009
• Status: Expired due to Fees

• Current Assignee: InterDigital Patent Holdings, Inc. (InterDigital, Inc.)
• Original Assignee: Thomson Licensing (Vantiva SA)
• Inventors: Knutson, Paul Gothard, Gao, Wen, Schmitt, Dirk
• Primary Examiner(s): FILE, ERIN M
• Application Number:
  US13/320,128
• Publication Number:
  US 20120057664A1
• Time in Patent Office: 1,404 Days
• Field of Search: 375/343
• US Class Current: 375/343
• CPC Class Codes: H04H 40/90 specially adapted for satellite broadcast receiving
• CPC Class Codes: H04L 2027/0053 Closed loops
• CPC Class Codes: H04L 2027/0067 Phase error detectors
• CPC Class Codes: H04L 27/0014 Carrier regulation of chaotic carriers H04L27/001; for multicarrier receivers H04L27/2657
• CPC Class Codes: H04L 27/2656 Frame synchronisation, e.g. packet synchronisation, time division duplex [TDD] switching point detection or subframe synchronisation
• CPC Class Codes: H04L 27/2678 using cyclostationarities, e.g. cyclic prefix or postfix
• CPC Class Codes: H04L 27/2679 Decision-aided
• CPC Class Codes: H04L 7/0062 detection of error based on data decision error, e.g. Mueller type detection
• CPC Class Codes: H04L 7/042 Detectors therefor, e.g. correlators, state machines digital correlators in general G06F17/15
• CPC Class Codes: H04L 7/10 Arrangements for initial synchronisation
• CPC Class Codes: H04W 56/005 compensating for timing error by adjustment in the receiver

Abstract

Methods and apparatus for symbol timing recovery are provided. Both a coarse symbol timing recovery method and apparatus, and a fine symbol timing recovery method and apparatus are described which can be used jointly for symbol recovery, for example in phase shift keying receivers. The coarse method involves the use of differential correlations and finding the time difference in peak values of the correlation results. The fine method involves interpolation of a received digital signal, followed by filtering and timing error detection. The error detection signal is further filtered and used to control the interpolator. The methods provide for robust symbol timing synchronization.

Claims

1. A method of symbol timing recovery, comprising:

performing one or more differential correlation operations on a received signal at the sample rate, wherein the correlation operation is performed by using a data aided feed forward symbol timing recovery method using known synchronization symbols embedded in a signal;

measuring a time difference between peak values of the correlation function;

using the time difference as an estimate of symbol timing offset to determine a coarse symbol timing; and

receiving a further digital signal using said coarse symbol timing.

2. The method of claim 1, wherein the correlation operation is performed on a signal having repeated known symbols.

3. The method of claim 1, wherein the correlation operation is performed twice.

4. An apparatus for symbol timing recovery, comprising:

a processing circuit for performing one or more differential correlation operations on a received signal at the sample rate, wherein the correlation operation is performed by using a data aided feed forward symbol timing recovery method using known synchronization symbols embedded in a signal;

circuitry for measuring a time difference between peak values of the correlation function;

a timing error detector for determining coarse symbol timing using the time difference as an estimate of symbol timing offset; and

a receiver for receiving a further digital signal using said coarse symbol timing.

5. The apparatus of claim 4, wherein the correlation operation is performed on a signal having repeated known symbols.

6. The apparatus of claim 4, wherein the correlation operation is performed twice.

7. A method of improved symbol timing recovery, comprising:

interpolating a received digital signal, wherein interpolating is controlled by a numerically controlled delay;

filtering a timing error detection signal with a loop filter;

controlling the numerically controlled delay using output of said loop filter

filtering of the interpolated signal using one of a first filter and a second filter, wherein the first filter is a prefilter and the second filter is a matched filter followed by said prefilter, and wherein the first filter is used during an acquisition phase and the second filter is used during a tracking phase;

finding a timing error of said filtered interpolated signal as an estimate of fine symbol timing offset to determine symbol timing;

receiving a further digital signal using said fine symbol timing.

8. The method of claim 7, wherein the output time difference is filtered with a Moving Time Average filter before said loop filter.

9. The method of claim 7, wherein an iteration counter is used to determine an acquisition time and a tracking time.

10. The method of claim 9, wherein a low delay matched filter is used for timing recovery and a different matched filter is used for data.

11. An apparatus for improved symbol timing recovery, comprising:

an interpolator for interpolating a received digital signal, wherein interpolating is controlled by a numerically controlled delay;

a loop filter for filtering a time difference signal;

a controller for controlling the numerically controlled delay using output of said loop filter;

a filter for filtering of the interpolated signal using one of a first filter and a second filter, wherein the first filter is a prefilter and the second filter is a matched filter followed by said prefilter, and wherein the first filter is used during an acquisition phase and the second filter is used during a tracking phase;

a timing error detector for finding the timing error as an estimate of symbol timing offset to determine symbol timing;

a receiver for receiving a further digital signal using said fine symbol timing.

12. The apparatus of claim 11, wherein the output time difference is filtered with a Moving Time Average filter before said loop filter.

13. The apparatus of claim 11, wherein an iteration counter is used to determine an acquisition time and a tracking time.

14. The apparatus of claim 13, wherein a low delay matched filter is used for timing recovery and a different matched filter is used for data.

15. A method of symbol timing recovery, comprising:

performing one or more differential correlation operations on a received signal;

measuring a time difference between peak values of the correlation function;

using the time difference as an estimate of symbol timing offset to determine a coarse symbol timing;

using said coarse symbol timing to receive a further digital signal;

interpolating further received digital signal, wherein interpolating is controlled by a numerically controlled delay;

filtering a timing error detection signal with a loop filter;

controlling the numerically controlled delay using output of said loop filter

filtering of the interpolated output using one of a first filter and a second filter, wherein the first filter is a prefilter and the second filter is a matched filter followed by said prefilter, and wherein the first filter is used during an acquisition phase and the second filter is used during a tracking phase;

finding the timing error of the filtered interpolated signal as a further estimate of symbol timing offset to determine a fine symbol timing;

using said fine symbol timing to receive a subsequent digital signal.

16. An apparatus for symbol timing recovery, comprising:

a processing circuit for performing one or more differential correlation operations on a received signal;

circuitry for measuring a time difference between peak values of the correlation function;

a first timing error detector for determining coarse symbol timing using the time difference as an estimate of symbol timing offset;

a receiver for receiving a further digital signal using said coarse symbol timing;

an interpolator for interpolating said further received digital signal, wherein interpolating is controlled by a numerically controlled delay;

a loop filter for filtering a time difference signal;

a controller for controlling the numerically controlled delay using output of said loop filter;

a filter for filtering the interpolated output using one of a first filter and a second filter, wherein the first filter is a prefilter and the second filter is a matched filter followed by said prefilter, and wherein the first filter is used during an acquisition phase and the second filter is used during a tracking phase;

a second timing error detector for calculating the timing error of the filtered interpolated signal as an estimate of symbol timing offset to determine the symbol timing;

a receiver for receiving a subsequent digital signal using said fine symbol timing.