Method for forming void-free dielectric layer

• US 8,691,659 B2
• Filed: 10/26/2011
• Issued: 04/08/2014
• Est. Priority Date: 10/26/2011
• Status: Active Grant

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Hsu, Ching-Pin, Lin, Yi-Po, Liao, Jiunn-Hsiung, Chen, Chieh-Te, Chang, Feng-Yi, Tsai, Shang-Yuan, Chen, Li-Chiang
• Primary Examiner(s): Malsawma, Lex
• Assistant Examiner(s): Zhu, Sheng
• Application Number:
  US13/281,459
• Publication Number:
  US 20130109151A1
• Time in Patent Office: 895 Days
• Field of Search: 257/343, 257/E21.546, 257/351, 438/424, 438/437, 438/154, 438/786, 438/157, 438/694
• US Class Current: 438/424
• CPC Class Codes: H01L 21/76232 of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls H01L21/76229 takes precedence

Abstract

A method for forming a dielectric layer free of voids is disclosed. First, a substrate, a first stressed layer including a recess, a second stressed layer disposed on the first stressed layer and covering the recess and a patterned photoresist embedded in the recess are provided. Second, a first etching step is performed to totally remove the photoresist so that the remaining second stressed layer forms at least one protrusion adjacent to the recess. Then, a trimming photoresist is formed without exposure to fill the recess and to cover the protrusion. Later, a trimming etching step is performed to eliminate the protrusion and to collaterally remove the trimming photoresist.

Claims

1. A method for forming a dielectric layer, comprising:

providing a substrate, a recess disposed in said substrate, a buffer layer disposed on said substrate without covering said recess and at least one protrusion disposed on said substrate and adjacent to said recess;

forming a trimming photoresist without exposure to fill said recess and to cover said protrusion and said exposed buffer layer;

performing an etching-back step to partially remove said trimming photoresist to expose said at least one protrusion;

performing a trimming etching step to eliminate said protrusion;

performing an ashing step to eliminate said trimming photoresist; and

forming a dielectric layer to fill said recess and to cover said buffer layer.

2. The method for forming a dielectric layer of claim 1, further comprising:

forming a shallow trench isolation disposed under said recess.

3. The method for forming a dielectric layer of claim 1, wherein said substrate comprises a polysilicon layer surrounding said recess and under said buffer layer.

4. The method for forming a dielectric layer of claim 1, further comprising:

forming a silicide layer disposed on said substrate.

5. The method for forming a dielectric layer of claim 1, further comprising:

forming a first stressed layer disposed on said substrate to define said recess;

forming a second stressed layer disposed on said buffer layer and covering said recess;

forming a patterned photoresist covering and embedded in said recess; and

performing a first etching step to remove said second stressed layer disposed on said buffer layer and to expose said buffer layer so that said remaining second stressed layer forms at least one protrusion adjacent to said recess.

6. The method for forming a dielectric layer of claim 5, further comprising:

forming a mask layer disposed on said second stressed layer.

7. The method for forming a dielectric layer of claim 6, wherein said first etching step partially removes said mask layer to form part of said protrusion.

8. The method for forming a dielectric layer of claim 5, wherein said first stressed layer is one of a compressive layer and a tensile layer.

9. The method for forming a dielectric layer of claim 5, wherein said second stressed layer is one of a compressive layer and a tensile layer different from said first stressed layer.

10. The method for forming a dielectric layer of claim 1, wherein said trimming photoresist is baked.

11. The method for forming a dielectric layer of claim 5, wherein said trimming photoresist and said patterned photoresist are of the same material.

12. The method for forming a dielectric layer of claim 5, wherein said trimming photoresist and said patterned photoresist are of different materials.

13. The method for forming a dielectric layer of claim 1, wherein an oxygen-containing etchant is used in said etching-back step.

14. The method for forming a dielectric layer of claim 1, wherein said protrusion is not substantially damaged in said etching-back step.

15. The method for forming a dielectric layer of claim 1, wherein said etching-back step is monitored by a time mode.

16. The method for forming a dielectric layer of claim 1, wherein a fluorine-containing etchant is used in said trimming etching step.

17. The method for forming a dielectric layer of claim 1, wherein said trimming etching step collaterally removes said trimming photoresist on said buffer layer to expose said buffer layer.

18. The method for forming a dielectric layer of claim 1, wherein said ashing step is performed in an oxygen-containing atmosphere.

19. The method for forming a dielectric layer of claim 5, wherein said remaining second stressed layer forms a pair of said protrusions adjacent to said recess.

20. The method for forming a dielectric layer of claim 1, wherein said dielectric layer is free of voids.