Backside process for a substrate
First Claim
1. A method of forming a semiconductor device comprising:
- providing conductive material forming through vias having thicknesses in a range from a maximum thickness to a minimum thickness, embedded within a first substrate, wherein the first substrate comprises a non-conducting material;
mechanically grinding a backside of the first substrate to a thickness wherein at least 1 μ
m of the non-conducting material remains covering the conductive material embedded within the first substrate so that the grinding exposes no portion of any one of the through vias, the thickness of the first substrate being greater than the maximum thickness following the grinding;
following the grinding, employing chemical mechanical polishing (CMP) with an undiscerning slurry to the backside of the first substrate, thereby exposing the conductive material of each of the through vias, the thickness of the first substrate being less than the minimum thickness following the CMP; and
following the CMP, employing a spin wet-etch, with a protective formulation to remove a thickness y of the non-conducting material from the backside of the first substrate, thereby causing the conductive material of each of the through vias to protrude from the backside of the first substrate.
1 Assignment
0 Petitions
Accused Products
Abstract
A method of forming a semiconductor device is presented. A conductor is embedded within a substrate, wherein the substrate contains a non-conducting material. The backside of the substrate is ground to a thickness wherein at least 1 μm of the non-conducting material remains on the backside covering the conductor embedded within the substrate. Chemical mechanical polishing (CMP) is employed with an undiscerning slurry to the backside of the substrate, thereby planarizing the substrate and exposing the conductive material. A spin wet-etch, with a protective formulation, is employed to remove a thickness y of the non-conducting material from the backside of the substrate, thereby causing the conductive material to uniformly protrude from the backside of the substrate.
-
Citations
20 Claims
-
1. A method of forming a semiconductor device comprising:
-
providing conductive material forming through vias having thicknesses in a range from a maximum thickness to a minimum thickness, embedded within a first substrate, wherein the first substrate comprises a non-conducting material; mechanically grinding a backside of the first substrate to a thickness wherein at least 1 μ
m of the non-conducting material remains covering the conductive material embedded within the first substrate so that the grinding exposes no portion of any one of the through vias, the thickness of the first substrate being greater than the maximum thickness following the grinding;following the grinding, employing chemical mechanical polishing (CMP) with an undiscerning slurry to the backside of the first substrate, thereby exposing the conductive material of each of the through vias, the thickness of the first substrate being less than the minimum thickness following the CMP; and following the CMP, employing a spin wet-etch, with a protective formulation to remove a thickness y of the non-conducting material from the backside of the first substrate, thereby causing the conductive material of each of the through vias to protrude from the backside of the first substrate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
-
-
16. A method of manufacturing a semiconductor structure, comprising:
-
providing a substrate with a bulk material containing a plurality of through substrate vias (TSVs), ranging in thickness from Tmax to Tmin; mechanically grinding a backside of the substrate, wherein a remaining thickness X of the bulk material continues to protect the TSVs, no portion of any one of the TSVs being exposed by the mechanical grinding; following the mechanical grinding, chemical mechanical polishing the backside of the substrate thereby reducing the respective thicknesses of the plurality of TSVs to Tcmp, wherein Tcmp≦
Tmin;
wherein a portion of each of the plurality of TSVs is exposed following the chemical mechanical polishing; andfollowing the chemical mechanical polishing, etching a thickness y of the bulk material from the backside of the substrate in a spin wet-etch employing a protective formulation. - View Dependent Claims (17, 18, 19)
-
-
20. A method of manufacturing a semiconductor structure comprising:
-
providing a silicon wafer with a copper through substrate via (TSV) beneath a surface of the silicon wafer; backgrinding the silicon wafer, wherein a remaining thickness of silicon continues to protect the TSV; subsequent to the backgrinding, using a slurry with an oxidizer, planarizing a backside of the silicon wafer to expose a portion of the TSV; and subsequent to the planarizing, wet-etching the silicon wafer in a spinning tool employing an etchant having an etch selectivity ratio between copper and silicon of between about 1;
10 and about 1;
1000, so that the TSV protrudes above the surface of the silicon wafer.
-
Specification