Memory controller and operating method of memory controller
First Claim
1. A controller of a memory system to control a memory device, comprising:
- a key equation solving unit to calculate an error location polynomial in a read vector received by the controller to read data from the memory device;
a control unit to estimate the number of errors in the received read vector according to at least one of the calculated error location polynomial and information on the error location polynomial; and
a chien search unit to search error locations of the received read vector according to the calculated error location polynomial,wherein the control unit adjusts the cycle-per power consumption of the chien search unit.
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Accused Products
Abstract
A controller to control a memory system including a memory device. The controlling the memory system may include calculating an error location polynomial in a received read vector with a key equation solving unit of the memory system to read data from the memory device, estimating the number of errors in the received read vector with a control unit of the memory system according to at least one of the calculated error location polynomial and information on the error location polynomial, searching error locations of the received read vector according to the calculated error location polynomial with a chien search unit of the memory system with the control unit. A cycle-per power consumption of the chien search unit may be adjusted with the control unit. A maximum correction time may be adjusted according to the number of errors of the read vector.
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Citations
34 Claims
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1. A controller of a memory system to control a memory device, comprising:
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a key equation solving unit to calculate an error location polynomial in a read vector received by the controller to read data from the memory device; a control unit to estimate the number of errors in the received read vector according to at least one of the calculated error location polynomial and information on the error location polynomial; and a chien search unit to search error locations of the received read vector according to the calculated error location polynomial, wherein the control unit adjusts the cycle-per power consumption of the chien search unit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A method of controlling a memory system including a memory device, the method comprising:
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calculating an error location polynomial in a received read vector with a key equation solving unit of the memory system to read data from the memory device; estimating the number of errors in the received read vector with a control unit of the memory system according to at least one of the calculated error location polynomial and information on the error location polynomial; and searching error locations of the received read vector according to the calculated error location polynomial with a chien search unit of the memory system with the control unit; and adjusting the cycle-per power consumption of the chien search unit with the control unit. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32)
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33. A method of controlling a memory system having a controller coupled via at least one channel to at least one memory device, the method comprising:
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determining an estimated number of errors and error location information of a read vector received by the controller to read data from the at least one memory device via the at least one channel; and adjusting at least one of a cycle-per-power consumption and a maximum correction time of a chien search unit of the memory system that searches error locations of the read vector according to the estimated number of errors and the determined error location information.
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34. A controller of a memory system having at least one memory device coupled to the controller via at least one channel, comprising:
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an error correction code decoder of the controller to determine an estimated number of errors and error location information of a read vector received by the controller to read data from the at least one memory device via the at least one channel; and a control unit of the error correction code decoder to adjust at least one of a cycle-per-power consumption and a maximum correction time of a chien search unit of the memory system that searches error locations of the read vector according to the estimated number of errors and the determined error location information.
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Specification