Unified debug system with multiple user-configurable trace volumes and trace buffers

• US 8,694,970 B2
• Filed: 06/02/2005
• Issued: 04/08/2014
• Est. Priority Date: 06/02/2005
• Status: Active Grant

• Current Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Original Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Inventors: Edgar, Brian T., Gaertner, Mark A., Thakar, Bhooshan S.
• Primary Examiner(s): Dam, Tuan Q.
• Assistant Examiner(s): Wei, Zheng
• Application Number:
  US11/143,338
• Publication Number:
  US 20060277441A1
• Time in Patent Office: 3,232 Days
• Field of Search: None
• US Class Current: 717/125
• CPC Class Codes: G06F 11/3664 Environments for testing or debugging software

Abstract

A unified debug system with multiple user-configurable trace volumes is disclosed, including embodiments as a system, a method, and a computer-readable medium. Embodiments of the present invention provide more robust and flexible solutions for introducing configurable trace volumes to firmware, allowing a user to specify firmware system configurations for trace buffers, trace frames, and trace volumes, and offer other advantages over the prior art. One embodiment of the present invention pertains to a system that includes a firmware component comprising firmware, and a firmware interface communicatively connected to the firmware component. The firmware includes a plurality of trace volumes for storing a plurality of trace entries. The trace volumes are user-configurable through the firmware interface. The plurality of trace volumes includes first, second and third trace volumes. The first trace volume includes storing at least some of the trace entries to a trace buffer in a first volatile memory component. The second trace volume includes storing at least some of the trace entries to one or more trace buffers in one or more trace frames in a second volatile memory component. The third trace volume includes storing at least some of the trace entries to one or more trace buffers in one or more trace frames in a non-volatile memory component.

Claims

1. A system comprising:

a first set of trace entries and corresponding timestamps stored in in a first memory component, based on a first trace volume;

a second set of trace entries and corresponding timestamps stored in a second memory component, based on a second trace volume; and

parallel timestamps corresponding to the second set of trace entries stored in the first memory component to provide trace entry time correlation for the first set of trace entries and the second set of trace entries,

wherein a bit-length of each of the timestamps corresponding to the first set of trace entries is different from a bit-length of each of the parallel timestamps,

wherein the first trace volume is a user-configurable fast trace volume which provides fastest available trace storage and comprises spooling at least some of the first set of trace entries stored in the first memory component to the second memory component to provide longer-term storage and retention of the first set of trace entries, and the second trace volume is a user-configurable non-fast trace volume.

2. The system of claim 1, wherein the first and second memory components are volatile memory components.

3. The system of claim 2, wherein the first memory component has a rate of storage that is faster than a rate of storage of the second memory component.

4. The system of claim 3, wherein the first memory component spools at least some of the first set of trace entries to the second memory component.

5. The system of claim 4, wherein the first memory component spools at least some of the first set of trace entries in priority over other tasks being executed by the system.

6. The system of claim 2, wherein the first memory component and the second memory component are comprised in separate volatile memory devices.

7. The system of claim 1, further comprising:

a third set of trace entries and corresponding timestamps stored in a third memory component; and

parallel timestamps corresponding to the third set of trace entries stored in the first memory component.

8. The system of claim 7, wherein the third memory component comprises a non-volatile memory component.

9. The system of claim 7, wherein:

the first memory component contains a trace buffer in which the first trace entries are stored;

the second memory component contains the second set of trace entries in one or more trace buffers in one or more trace frames; and

the third memory component contains the third set of trace entries in one or more trace buffers in one or more trace frames.

10. The system of claim 9, wherein one of the trace frames in the second memory component is a trigger capture trace frame of suitable size for a trigger capture trace entry, wherein the second memory component contiguously stores the trigger capture trace entry, responsively to a trigger, in the trigger capture trace frame.

11. The system of claim 10, wherein at least one of the trace frames in the second memory component is a fast wrap trace frame that comprises more than one trace buffer, wherein the second memory component stores trace entries in the trace buffers in the fast wrap trace frame at a rate that is fast relative to a rate at which the trace buffers are spooled from the trace frame to the third memory component, and stores new trace entries over older trace entries when the fast trace frame is full.

12. The system of claim 11, wherein at least one of the trace frames in the second memory component is a slow wrap trace frame that comprises more than one trace buffer, wherein the second memory component stores trace entries in the trace buffers in the slow wrap trace frame at a rate that is slow relative to a rate at which the trace buffers are spooled from the trace frame to the third memory component, and stores new trace entries over older trace entries when the slow trace frame is full.

13. The system of claim 12, wherein at least one of the trace frames in the second memory component is a non-wrap trace frame, wherein the second memory component stores trace entries in the trace buffers in the non-wrap trace frame until it is full, then stops the storing of new trace entries in the non-wrap trace frame.

14. The system of claim 9, wherein at least one of the trace frames in the third memory component is selected from the group consisting of a lifetime trace frame that comprises trace buffers with trace entries configured to persist for the lifetime of the system, wherein the trace buffers configured to persist for the lifetime of the system include a drive format trace buffer and a firmware download trace buffer;

and a configuration and defect management history trace frame, comprising a plurality of trace buffers that may be overwritten, the plurality of trace buffers that may be overwritten including a Mode Select command trace buffer, a Log Select command buffer, and an automatic reassignments trace buffer.

15. The system of claim 7, wherein the second memory component spools at least some of the second set of trace entries to the third memory component.

16. The system of claim 1, wherein the bit-length of each of the timestamps corresponding to the first set of trace entries is 16 bits and wherein the bit-length of each of the parallel timestamps is of 64 bits.

17. A method comprising:

providing a system comprising;

a first memory component; and

a second memory component;

storing a first set of trace entries and corresponding timestamps in the first memory component, based on a first trace volume;

storing a second set of trace entries and corresponding timestamps in the second memory component, based on a second trace volume; and

storing parallel timestamps corresponding to the second set of trace entries in the first memory component to provide trace entry time correlation for the first set of trace entries and the second set of trace entries,

wherein a bit-length of each of the timestamps corresponding to the first set of trace entries is different from a bit-length of each of the parallel timestamps,

wherein the first trace volume is a user-configurable fast trace volume which provides fastest available trace storage and comprises spooling at least some of the first set of trace entries stored in the first memory component to the second memory component to provide longer-term storage and retention of the first set of trace entries, and the second trace volume is a user-configurable non-fast trace volume.

18. The method of claim 17, further comprising spooling at least some of the trace entries stored in the first memory component to the second memory component.

19. The method of claim 17, wherein:

providing a system further comprises providing a system comprising a third memory component;

the method comprises storing a third set of trace entries and corresponding timestamps in the third memory component; and

storing parallel timestamps corresponding to the third set of trace entries in the first memory component.

20. A system comprising:

a first set of trace entries stored in in a trace buffer in a first memory component;

a second set of trace entries and corresponding timestamps stored in one or more trace buffers in one or more trace frames in a second memory component;

a third set of trace entries and corresponding timestamps stored in one or more trace buffers in one or more trace frames in a third memory component; and

parallel timestamps corresponding to the second set of trace entries and parallel timestamps corresponding to the third set of trace entries stored in the first memory component,

wherein at least one of the trace frames in the third memory component is selected from the group consisting of a lifetime trace frame that comprises trace buffers with trace entries configured to persist for the lifetime of the system, wherein the trace buffers configured to persist for the lifetime of the system include a drive format trace buffer and a firmware download trace buffer; and

a configuration and defect management history trace frame, comprising a plurality of trace buffers that may be overwritten, the plurality of trace buffers that may be overwritten including a Mode Select command trace buffer, a Log Select command buffer, and an automatic reassignments trace buffer.