Display device

• US 8,698,155 B2
• Filed: 06/24/2013
• Issued: 04/15/2014
• Est. Priority Date: 12/04/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Kimura, Hajime
• Primary Examiner(s): Pham, Hoai V
• Application Number:
  US13/924,735
• Publication Number:
  US 20130271688A1
• Time in Patent Office: 295 Days
• Field of Search: 257/59, 257/72, 257/347, 257/E29.117, 257/E29.273
• US Class Current: 257/59
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G09G 3/3696 Generation of voltages supplied to electrode drivers

Abstract

The time taken to write a signal to a pixel is shortened in a display device. Further, a signal is written at high speed even when high voltage is applied. The display device includes a pixel including a transistor and a liquid crystal element electrically connected to a source or a drain of the transistor. The transistor includes an intrinsic or substantially intrinsic oxide semiconductor as a semiconductor material and has an off-state current of 1×10⁻¹⁷ A/μm or less. The pixel does not include a capacitor. Since it is not necessary to provide a capacitor, the time taken to write a signal can be shortened.

Claims

1. A display device comprising:

a pixel, the pixel comprising;

a transistor; and

a liquid crystal element,

wherein the liquid crystal element is electrically connected to one of a source and a drain of the transistor,

wherein the transistor includes an intrinsic or substantially intrinsic oxide semiconductor layer which includes a channel formation region,

wherein the oxide semiconductor layer comprises a portion in which a concentration of hydrogen is 5×

10¹⁹/cm³ or lower, and

wherein a voltage higher than or equal to a voltage of a video signal is input to the liquid crystal element before the video signal is input.

2. The display device according to claim 1, wherein an off-state current of the transistor is 1×

10<sup>−

17</sup> A/μ

m or less.

3. The display device according to claim 1, wherein the pixel does not include a capacitor wiring.

4. The display device according to claim 1, wherein a parasitic capacitance in the pixel is less than or equal to 50 fF.

5. The display device according to claim 1, wherein the pixel does not include a storage capacitor element.

6. A display device comprising:

a pixel, the pixel comprising;

a transistor; and

a liquid crystal element,

wherein the liquid crystal element is electrically connected to one of a source and a drain of the transistor,

wherein the transistor includes an oxide semiconductor layer including a channel formation region,

wherein the oxide semiconductor layer comprises a portion in which a concentration of hydrogen is 5×

10¹⁹/cm³ or lower,

wherein the oxide semiconductor layer comprises a portion in which a carrier concentration is 1×

10¹²/cm³ or lower, and

wherein a voltage higher than or equal to a voltage of a video signal is input to the liquid crystal element before the video signal is input.

7. The display device according to claim 6, wherein an off-state current of the transistor is 1×

10<sup>−

17</sup> A/μ

m or less.

8. The display device according to claim 6, wherein the pixel does not include a capacitor wiring.

9. The display device according to claim 6, wherein a parasitic capacitance in the pixel is less than or equal to 50 fF.

10. The display device according to claim 6, wherein the pixel does not include a storage capacitor element.

11. A display device comprising:

a pixel, the pixel comprising;

a first electrode;

a second electrode, the second electrode comprising a portion not overlapping with the first electrode;

an insulating film between the first electrode and the second electrode;

a transistor; and

a liquid crystal layer,

wherein the liquid crystal layer is over the first electrode and the second electrode,

wherein the second electrode is electrically connected to one of a source and a drain of the transistor,

wherein the transistor includes an intrinsic or substantially intrinsic oxide semiconductor layer which includes a channel formation region,

wherein the oxide semiconductor layer comprises a portion in which a concentration of hydrogen is 5×

10¹⁹/cm³ or lower, and

wherein a voltage higher than or equal to a voltage of a video signal is input to the first electrode before the video signal is input.

12. The display device according to claim 11, wherein an off-state current of the transistor is 1×

10<sup>−

17</sup> A/μ

m or less.

13. The display device according to claim 11, wherein the pixel does not include a capacitor wiring.

14. The display device according to claim 11, wherein a parasitic capacitance in the pixel is less than or equal to 50 fF.

15. The display device according to claim 11, wherein the second electrode is over the first electrode.

16. The display device according to claim 11, wherein the first electrode and the second electrode do not overlap with each other.

17. The display device according to claim 11, wherein the oxide semiconductor layer comprises a portion in which a carrier concentration is 1×

10¹²/cm³ or lower.

18. The display device according to claim 11, wherein the pixel does not include a storage capacitor element.