Semiconductor memory device having a low off state current and high repeatability
First Claim
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1. A semiconductor device comprising:
- a first transistor comprising a first semiconductor;
a second transistor comprising an oxide semiconductor;
a capacitor; and
a node where one of a source electrode and a drain electrode of the second transistor is connected to a gate electrode of the first transistor and one electrode of the capacitor,wherein data is written by applying a first potential to the other of the source electrode and the drain electrode of the second transistor when the second transistor are turned on by applying a second potential to a gate electrode of the second transistor,wherein data is hold at the node when the second transistor is turned off,wherein data hold at the node is read out by determining whether the first transistor is in an on state or an off state when a third potential is applied to the other electrode of the capacitor, andwherein a difference between a first threshold voltage of the first transistor in the on state and a second threshold of the first transistor in the off state is kept within 2% or less before and after 1×
109 times of writing.
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Abstract
A semiconductor device has a non-volatile memory cell including a write transistor which includes an oxide semiconductor and has small leakage current in an off state (off-state current) between a source and a drain, a read transistor including a semiconductor material different from that of the write transistor, and a capacitor. Data is written or to the memory cell by applying a potential to a node where one of a source electrode and drain electrode of the write transistor, one electrode of the capacitor, and a gate electrode of the read transistor are electrically connected to one another so that the predetermined amount of charge is held in the node. The memory window width is changed by 2% or less, before and after 1×109 times of writing.
102 Citations
16 Claims
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1. A semiconductor device comprising:
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a first transistor comprising a first semiconductor; a second transistor comprising an oxide semiconductor; a capacitor; and a node where one of a source electrode and a drain electrode of the second transistor is connected to a gate electrode of the first transistor and one electrode of the capacitor, wherein data is written by applying a first potential to the other of the source electrode and the drain electrode of the second transistor when the second transistor are turned on by applying a second potential to a gate electrode of the second transistor, wherein data is hold at the node when the second transistor is turned off, wherein data hold at the node is read out by determining whether the first transistor is in an on state or an off state when a third potential is applied to the other electrode of the capacitor, and wherein a difference between a first threshold voltage of the first transistor in the on state and a second threshold of the first transistor in the off state is kept within 2% or less before and after 1×
109 times of writing. - View Dependent Claims (2, 3, 4)
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5. A semiconductor device comprising:
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a first transistor comprising a first semiconductor; a second transistor comprising an oxide semiconductor;
wherein an off-state current density of the second transistor is equal to 100 zA/μ
m or less,a capacitor; and a node where one of a source electrode and a drain electrode of the second transistor is connected to a gate electrode of the first transistor and one electrode of the capacitor, wherein data is written by applying a first potential to the other of the source electrode and the drain electrode of the second transistor when the second transistor are turned on by applying a second potential to a gate electrode of the second transistor, wherein data is hold at the node when the second transistor is turned off, wherein data hold at the node is read out by determining whether the first transistor is in an on state or an off state when a third potential is applied to the other electrode of the capacitor, and wherein a difference between a first threshold voltage of the first transistor in the on state and a second threshold of the first transistor in the off state is kept within 2% or less before and after 1×
109 times of writing. - View Dependent Claims (6, 7, 8)
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9. A method for using a semiconductor device including a first transistor, a second transistor including an oxide semiconductor, and a capacitor, wherein a gate electrode of the first transistor is connected to one of a source electrode and a drain electrode of the second transistor and one electrode of the capacitor at a node, comprising the step of:
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writing data is written at the node by applying a first potential to the other of the source electrode and the drain electrode of the second transistor while turning on the second transistor by applying a second potential to a gate electrode of the second transistor, and reading out data written at the node whether the first transistor is in an on state or an off state when applying a third potential is applied to the other electrode of the capacitor, and wherein a difference between a first threshold voltage of the first transistor in the on state and a second threshold voltage of the first transistor in the off state is kept within 2% or less before and after 1×
109 times of writing. - View Dependent Claims (10, 11, 12)
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13. A method for using a semiconductor device including a first transistor, a second transistor including an oxide semiconductor, and a capacitor, wherein a gate electrode of the first transistor is connected to one of a source electrode and a drain electrode of the second transistor and one electrode of the capacitor at a node, comprising the steps of:
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writing data at the node by applying a first potential to the other of the source electrode and the drain electrode of the second transistor while turning on the second transistor applying a second potential to a gate electrode of the second transistor; and reading out data at the node whether the first transistor is in an on state or an off state when applying a third potential to the other electrode of the capacitor, wherein a difference between a first threshold voltage of the first transistor in the on state and a second threshold voltage of the first transistor in the off state is kept within 2% or less before and after 1×
109 times of writing, andwherein an off-state current density of the second transistor is equal to 100 zA/μ
m or less. - View Dependent Claims (14, 15, 16)
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Specification
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Current AssigneeSemiconductor Energy Laboratory Co., Ltd.
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Original AssigneeSemiconductor Energy Laboratory Co., Ltd.
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InventorsSekine, Yusuke, Shionoiri, Yutaka, Kato, Kiyoshi, Yamazaki, Shunpei
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Primary Examiner(s)Luu, Chuong A
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Assistant Examiner(s)ESKRIDGE, CORY W
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Application NumberUS13/004,200Publication NumberTime in Patent Office1,190 DaysField of Search257/68, 257/71, 257/296, 257/298, 257/300, 257/303, 257/304, 257/307, 257/312, 257/322, 257/319US Class Current257/298CPC Class CodesH01L 27/105 including field-effect comp...H01L 27/1207 combined with devices in co...H01L 27/1225 with semiconductor material...H10B 41/70 the floating gate being an ...H10B 99/00 Subject matter not provided...
