Semiconductor device including a circuit configured to hold an offset voltage

• US 8,698,551 B2
• Filed: 05/10/2012
• Issued: 04/15/2014
• Est. Priority Date: 05/13/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Umezaki, Atsushi
• Primary Examiner(s): LUU, AN T
• Application Number:
  US13/468,135
• Publication Number:
  US 20120286855A1
• Time in Patent Office: 705 Days
• Field of Search: 327/108, 327/538, 327540-543, 327/424, 327429-430
• US Class Current: 327/538
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/167 by electrophoresis
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0876 Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
• CPC Class Codes: G09G 2310/0286 Details of a shift registers arranged for use in a driving circuit
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/3225 using an active matrix
• CPC Class Codes: G09G 3/344 based on particles moving in a fluid or in a gas, e.g. electrophoretic devices electrophoretic devices per se G02F1/167
• CPC Class Codes: G09G 3/36 using liquid crystals
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: G11C 19/184 with field-effect transistors, e.g. MOS-FET
• CPC Class Codes: G11C 19/28 using semiconductor elements G11C19/14, G11C19/36 take precedence
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/7869 : having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H03K 17/06 : Modifications for ensuring a fully conducting state
• CPC Class Codes: H03K 17/08104 : in field-effect transistor switches H03K17/0812, H03K17/0814 take precedence
• CPC Class Codes: H03K 19/018521 : of complementary type, e.g. CMOS
• CPC Class Codes: H03K 3/356 : Bistable circuits
• CPC Class Codes: H10K 59/12 : Active-matrix OLED [AMOLED] displays

Abstract

Provided is a semiconductor device which can operate stably even in the case where a transistor thereof is a depletion transistor. The semiconductor device includes a first transistor for supplying a first potential to a first wiring, a second transistor for supplying a second potential to the first wiring, a third transistor for supplying a third potential at which the first transistor is turned on to a gate of the first transistor and stopping supplying the third potential, a fourth transistor for supplying the second potential to the gate of the first transistor, and a first circuit for generating a second signal obtained by offsetting a first signal. The second signal is input to a gate of the fourth transistor. The potential of a low level of the second signal is lower than the second potential.

Claims

1. A semiconductor device comprising:

a first transistor configured to supply a first potential to a first wiring;

a second transistor configured to supply a second potential to the first wiring;

a third transistor configured to supply a third potential to a gate of the first transistor;

a fourth transistor configured to supply the second potential to the gate of the first transistor; and

a circuit electrically connected to a gate of the fourth transistor, the circuit being configured to hold an offset voltage,

wherein a signal in accordance with the offset voltage is input to the gate of the fourth transistor.

2. The semiconductor device according to claim 1, wherein the semiconductor device includes an oxide semiconductor.

3. The semiconductor device according to claim 1, wherein a potential of a low level of the signal is lower than the second potential.

4. The semiconductor device according to claim 1, wherein the signal is input to a gate of the second transistor.

5. The semiconductor device according to claim 1, wherein a conductivity of each of the first transistor to the fourth transistor is the same as each other.

6. The semiconductor device according to claim 1,

wherein the circuit comprises:

a capacitor whose one electrode is input with an input signal; and

a fifth transistor configured to supply a fourth potential to the other electrode of the capacitor, and

wherein the offset voltage is a difference between the input signal and the fourth potential.

7. The semiconductor device according to claim 6, wherein the fourth potential is lower than the second potential.

8. The semiconductor device according to claim 6, wherein a conductivity type of each of the first transistor to the fifth transistor is the same as each other.

9. The semiconductor device according to claim 1, wherein the semiconductor device is used for a flip-flop circuit.

10. The semiconductor device according to claim 9, wherein the flip-flop circuit is included in a shift register.

27. The semiconductor device according to claim 2, wherein the semiconductor device includes an oxide semiconductor.

11. A semiconductor device comprising:

a first wiring electrically connected to a first terminal of a first transistor and a first terminal of a second transistor;

a second wiring electrically connected to a second terminal of the first transistor and a gate of a third transistor, and a first terminal of the third transistor;

a third wiring electrically connected to a second terminal of the second transistor and a first terminal of a fourth transistor;

a gate of the first transistor electrically connected to a second terminal of the third transistor and a second terminal of the fourth transistor; and

a circuit electrically connected to a gate of the second transistor and a gate of the fourth transistor,

wherein the circuit is configured to hold an offset voltage.

12. The semiconductor device according to claim 11, wherein a signal in accordance with the offset voltage is input to the gate of the fourth transistor.

13. The semiconductor device according to claim 12, wherein a potential of a low level of the signal is lower than a potential of the third wiring.

14. The semiconductor device according to claim 12, wherein the signal is input to a gate of the second transistor.

15. The semiconductor device according to claim 11, wherein a conductivity type of each of the first transistor to the fourth transistor is the same as each other.

16. The semiconductor device according to claim 11, wherein the circuit comprises a capacitor electrically connected to the gate of the fourth transistor and a fifth transistor.

17. The semiconductor device according to claim 16,

wherein one electrode of the capacitor is input with an input signal, and the other electrode of the capacitor is input with a potential through the fifth transistor, and

wherein the offset voltage is a difference between the input signal and the potential.

18. The semiconductor device according to claim 16, wherein a conductivity type of each of the first transistor to the fifth transistor is the same as each other.

19. The semiconductor device according to claim 11, wherein the semiconductor device used for a flip-flop circuit.

20. The semiconductor device according to claim 19, wherein the flip-flop circuit is included in a shift register.

21. The semiconductor device according to claim 11, wherein the semiconductor device includes an oxide semiconductor.

22. A semiconductor device comprising:

a first circuit comprising a capacitor and a first transistor, the first circuit configured to hold an offset voltage; and

a second circuit comprising a second transistor, the second circuit being electrically connected to the first circuit,

wherein the first transistor has the same conductivity type as the second transistor.

23. The semiconductor device according to claim 22, wherein a signal in accordance with the offset voltage is input with the second transistor.

24. The semiconductor device according to claim 22,

wherein one electrode of the capacitor is input with an input signal, and the other electrode of the capacitor is input with a potential through the first transistor, and

wherein the offset voltage is a difference between the input signal and the potential.

25. The semiconductor device according to claim 22, wherein the semiconductor device is used for a flip-flop circuit.

26. The semiconductor device according to claim 25, wherein the flip-flop circuit is included in a shift register.