System and method for deadlock-free pipelining

• US 8,698,823 B2
• Filed: 04/08/2009
• Issued: 04/15/2014
• Est. Priority Date: 04/08/2009
• Status: Active Grant

• Current Assignee: NVIDIA Corporation
• Original Assignee: NVIDIA Corporation
• Inventors: Toksvig, Michael, Lindholm, Erik
• Primary Examiner(s): NGUYEN, HAU H
• Application Number:
  US12/420,751
• Publication Number:
  US 20100259536A1
• Time in Patent Office: 1,833 Days
• Field of Search: 345502-505, 345/522, 345/535
• US Class Current: 345/535
• CPC Class Codes: G06F 9/524 Deadlock detection or avoidance
• CPC Class Codes: G06T 1/20 Processor architectures; Processor configuration, e.g. pipelining
• CPC Class Codes: G06T 15/04 Texture mapping
• CPC Class Codes: G06T 15/50 Lighting effects
• CPC Class Codes: G09G 5/393 Arrangements for updating the contents of the bit-mapped memory

Abstract

A system and method for facilitating increased graphics processing without deadlock. Embodiments of the present invention provide storage for execution unit pipeline results (e.g., texture pipeline results). The storage allows increased processing of multiple threads as a texture unit may be used to store information while corresponding locations of the register file are available for reallocation to other threads. Embodiments further provide for preventing deadlock by limiting the number of requests and ensuring that a set of requests is not issued unless there are resources available to complete each request of the set of requests. Embodiments of the present invention thus provide for deadlock free increased performance.

Claims

1. A method of processing data in a graphics processing unit, said method comprising:

maintaining a count of vacant memory resources of a pipeline buffer, said pipeline buffer coupled to receive results from an execution unit of said graphics processing unit;

determining a number of requests for said execution unit of a thread, wherein said number of requests comprise a number of multiple request operations that are present within said thread before a read-back operation is present within said thread;

issuing said number of requests to said execution unit provided there is sufficient vacant memory resources of said pipeline buffer to accommodate all of said number of requests, otherwise not issuing any of said number of requests to said execution unit; and

said execution unit writing results of issued requests to said pipeline buffer after execution thereof.

2. A method as described in claim 1 wherein said maintaining said count of vacant memory resources of said pipeline buffer comprises decreasing said count of said vacant memory resources of said pipeline buffer responsive to said issuing said number of requests to said execution unit.

3. A method as described in claim 2 further comprising said thread executing read-back operations from said pipeline buffer corresponding to issued requests to said execution unit, and wherein said maintaining said count of vacant memory resources of said pipeline buffer further comprising increasing said count of said vacant memory resources of said pipeline buffer responsive to said thread executing said read-back operations.

4. A method as described in claim 1 wherein said execution unit is a texture unit within said graphics processing unit and wherein further each texture operation of said texture unit comprises a texture request operation for said texture unit and a texture read-back operation from said pipeline buffer.

5. A method as described in claim 4 wherein said issuing and said not issuing prevent deadlock of said texture unit by issuing only those grouped texture request operations that have allocated result space within said pipeline buffer wherein grouped texture request operations are all unissued sequential texture request operations within a thread that precede a first unissued texture read-back operation of said thread.

6. A method as described in claim 1 further comprising:

said thread issuing a math operation to a math functional unit of said graphics processor; and

said math functional unit obtaining source operands for said math operation from source registers of a register file and returning results from execution of said math operation to destination registers of said register file.

7. A method as described in claim 6 wherein said execution unit is a texture unit and wherein said register file does not receive results from execution of said texture unit.

8. A method of processing data in a graphics processing unit, said method comprising:

determining a size of a pipeline buffer, said pipeline buffer coupled to receive results from an execution unit of said graphics processing unit;

determining a number of threads allowable to concurrently operate with said execution unit based on a number of request operations within each thread and based further on said size of said pipeline buffer;

allowing only said number of threads, or less, to concurrently operate with said execution unit to prevent deadlock thereof;

said number of threads issuing request operations to said execution unit; and

said execution unit writing results of said request operations to said pipeline buffer after execution thereof.

9. A method as described in claim 8 wherein said determining a number of threads comprises dividing said size of said pipeline buffer by said number of request operations within each thread.

10. A method as described in claim 8 further comprising said number of threads executing read-back operations from said pipeline buffer corresponding to said request operations issued to said execution unit.

11. A method as described in claim 8 wherein said execution unit is a texture unit within said graphics processing unit and wherein further each texture operation of said texture unit comprises a texture request operation and a texture read-back operation from said pipeline buffer.

12. A method as described in claim 11 wherein said allowing only said number of threads, or less, to concurrently operate with said execution unit prevents deadlock by guaranteeing that all texture read-back operations within said number of threads will have an opportunity to execute.

13. A method as described in claim 8 further comprising:

threads issuing math operations to a math functional unit of said graphics processor; and

said math functional unit obtaining source operands for said math operations from source registers of a register file and returning results from execution of said math operations to destination registers of said register file.

14. A method as described in claim 13 wherein said execution unit is a texture unit and wherein said register file does not receive results from execution of said texture unit.

15. A computer readable storage medium having stored thereon, computer executable instructions that, if executed by a computer system cause the computer system to perform a method for processing data in a graphics processing unit comprising:

maintaining a count of vacant memory resources of a pipeline buffer, said pipeline buffer coupled to receive results from an execution unit of said graphics processing unit;

determining a number of requests for said execution unit of a thread, wherein said number of requests comprise a number of multiple request operations that are present within said thread before a read-back operation is present within said thread;

issuing said number of requests to said execution unit provided there is sufficient vacant memory resources of said pipeline buffer to accommodate all of said number of requests, otherwise not issuing any of said number of requests to said execution unit; and

said execution unit writing results of issued requests to said pipeline buffer after execution thereof.

16. The computer readable storage medium of claim 15, wherein said maintaining said count of vacant memory resources of said pipeline buffer comprises decreasing said count of said vacant memory resources of said pipeline buffer responsive to said issuing said number of requests to said execution unit.

17. The computer readable storage medium of claim 16 further comprising said thread executing read-back operations from said pipeline buffer corresponding to issued requests to said execution unit, and wherein said maintaining said count of vacant memory resources of said pipeline buffer further comprising increasing said count of said vacant memory resources of said pipeline buffer responsive to said thread executing said read-back operations.

18. The computer readable storage medium of claim 15, wherein said execution unit is a texture unit within said graphics processing unit and wherein further each texture operation of said texture unit comprises a texture request operation for said texture unit and a texture read-back operation from said pipeline buffer.

19. The computer readable storage medium of claim 18, wherein said issuing and said not issuing prevent deadlock of said texture unit by issuing only those grouped texture request operations that have allocated result space within said pipeline buffer wherein grouped texture request operations are all unissued sequential texture request operations within a thread that precede a first unissued texture read-back operation of said thread.

20. The computer readable storage medium of claim 15, wherein said method further comprises:

said thread issuing a math operation to a math functional unit of said graphics processor; and

said math functional unit obtaining source operands for said math operation from source registers of a register file and returning results from execution of said math operation to destination registers of said register file.