Nanopore device wetting

• US 8,702,944 B2
• Filed: 06/28/2012
• Issued: 04/22/2014
• Est. Priority Date: 06/15/2012
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Balagurusamy, Venkat K.
• Primary Examiner(s): DIETERLE, JENNIFER M
• Application Number:
  US13/535,882
• Publication Number:
  US 20130333721A1
• Time in Patent Office: 663 Days
• Field of Search: 204/451, 204/543, 204/518, 204/627, 436/86, 436/6, 977/924, 977/920, 977/773, 977/941, 977/942, 977/938, 977/953, 977/952, 977/781, 977/925, 977/904, 977/704, 205/777.5, 205/792, 422/68.1, 422/82.01, 435/6.1, 435/287.2
• US Class Current: 204/518
• CPC Class Codes: B82Y 30/00 Nanotechnology for materials or surface science, e.g. nanocomposites
• CPC Class Codes: G01N 27/447 using electrophoresis
• CPC Class Codes: G01N 33/48721 Investigating individual macromolecules, e.g. by translocation through nanopores Coulter counters in general G01N15/12; fabrication methods for nanoscale apertures B81B1/00; sequencing of nucleic acids C12Q1/68

Abstract

A method for wetting a nanopore device includes filling a first cavity of the nanopore device with a first buffer solution having a first potential hydrogen (pH) value, filling a second cavity of the nanopore device with a second buffer solution having a second pH value, wherein the nanopore device includes a transistor portion having a first surface, an opposing second surface, and an orifice communicative with the first surface and the second surface, the first surface partially defining the first cavity, the second surface partially defining the second cavity, applying a voltage in the nanopore device, and measuring a current in the nanopore device, the current having a current path partially defined by the first cavity, the second cavity, and the orifice.

Claims

1. A method for wetting a nanopore device, the method comprising:

filling a first cavity of the nanopore device with a first KCL buffer solution having a first potential hydrogen (pH) value of 7.5 to 8;

filling a second cavity of the nanopore device with a second KCL buffer solution having a second pH value of 10.9 to 2.1;

wherein the nanopore device includes a transistor portion having a first surface, an opposing second surface, and an orifice as a single pore communicative with the first surface and the second surface, the first surface partially defining the first cavity, the second surface partially defining the second cavity;

applying a voltage in the nanopore device; and

measuring a current in the nanopore device, the current having a current path partially defined by the first cavity, the second cavity, and the orifice.

2. The method of claim 1, wherein the nanopore device includes a first port communicative with the first cavity and a second port communicative with the first cavity, wherein the filling the first cavity of the nanopore device is performed by introducing the first KCL buffer solution into the first cavity through the first port.

3. The method of claim 1, wherein the nanopore device includes a third port communicative with the second cavity and a fourth port communicative with the second cavity, wherein the filling the second cavity of the nanopore device is performed by introducing the second KCL buffer solution into the second cavity through the third port.

4. The method of claim 1, wherein the first KCL buffer solution is a KCl solution.

5. The method of claim 1, wherein the second KCL buffer solution is a KCl solution.

6. The method of claim 1, wherein prior to filling the first cavity of the nanopore device with the first KCL buffer solution, the method includes performing an initial wetting method.

7. The method of claim 6, wherein the initial wetting method includes:

filling the first cavity with isopropyl alcohol (IPA); and

filling the second cavity with IPA.

8. The method of claim 1, wherein the transistor portion includes:

a first layer of silicon nitride material that defines the second surface;

a layer of silicon disposed on the first layer of silicon nitride material;

a second layer of silicon nitride disposed on the layer of silicon;

a first layer of oxide material disposed on the second layer of silicon nitride;

a layer of titanium nitride material disposed on the first layer of oxide material;

a second layer of oxide material disposed on the layer of titanium nitride material; and

a third layer of silicon nitride material disposed on the second layer of oxide material, the third layer of silicon nitride material defines the first surface.