Field effect transistor

• US 8,704,222 B2
• Filed: 07/08/2013
• Issued: 04/22/2014
• Est. Priority Date: 12/11/2009
• Status: Expired

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Akimoto, Kengo, Yamazaki, Shunpei
• Primary Examiner(s): Blum, David S
• Application Number:
  US13/936,257
• Publication Number:
  US 20130292670A1
• Time in Patent Office: 288 Days
• Field of Search: 257/43, 257/E29.296
• US Class Current: 257/43
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

It is an object to provide a low-cost oxide semiconductor material which is excellent in controllability of the carrier concentration and stability, and to provide a field effect transistor including the oxide semiconductor material. An oxide including indium, silicon, and zinc is used as the oxide semiconductor material. Here, the content of silicon in the oxide semiconductor film is greater than or equal to 4 mol % and less than or equal to 8 mol %. The field effect transistor including such an In—Si—Zn—O film can withstand heat treatment at a high temperature and is effective against −BT stress.

Claims

1. A field effect transistor comprising:

a gate electrode;

a gate insulating film over the gate electrode;

an oxide semiconductor film over the gate insulating film; and

a source electrode and a drain electrode over the oxide semiconductor film,

wherein the oxide semiconductor film includes a taper shaped depression of a first taper angle between the source electrode and the drain electrode,

wherein each of the source electrode and the drain electrode includes a taper shaped edge of a second taper angle,

wherein the first taper angle is different from the second taper angle,

wherein an off-state current is 1×

10<sup>−

13</sup> A or less, and

wherein an on/off ratio is 10⁸ or more.

2. The field effect transistor according to claim 1, wherein the oxide semiconductor film comprises silicon.

3. The field effect transistor according to claim 1, wherein a concentration of hydrogen in the oxide semiconductor film is 5×

10¹⁹ atoms/cm³ or lower.

4. The field effect transistor according to claim 1,

wherein the source electrode and the drain electrode comprise tungsten, and

wherein the source electrode and the drain electrode are in contact with the oxide semiconductor film.

5. A field effect transistor comprising:

a gate electrode;

a gate insulating film over the gate electrode;

an oxide semiconductor film over the gate insulating film; and

a source electrode and a drain electrode over the oxide semiconductor film,

wherein the oxide semiconductor film includes a taper shaped depression of a first taper angle between the source electrode and the drain electrode,

wherein each of the source electrode and the drain electrode includes a taper shaped edge of a second taper angle,

wherein the first taper angle is different from the second taper angle,

wherein an off-state current is 1×

10<sup>−

13</sup> A or less, and

wherein an on/off ratio is 10⁸ or more,

wherein the oxide semiconductor film comprises indium and zinc.

6. The field effect transistor according to claim 5, wherein the oxide semiconductor film comprises silicon.

7. The field effect transistor according to claim 5, wherein a concentration of hydrogen in the oxide semiconductor film is 5×

10¹⁹ atoms/cm³ or lower.

8. The field effect transistor according to claim 5,

wherein the source electrode and the drain electrode comprise tungsten, and

wherein the source electrode and the drain electrode are in contact with the oxide semiconductor film.