Method of manufacturing a SiC bipolar junction transistor and SiC bipolar junction transistor thereof

• US 8,704,546 B2
• Filed: 11/29/2012
• Issued: 04/22/2014
• Est. Priority Date: 10/29/2010
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Fairchild Semiconductor Corporation (ON Semiconductor Corporation)
• Inventors: Konstantinov, Andrei
• Primary Examiner(s): Nguyen, Tung X
• Application Number:
  US13/689,681
• Publication Number:
  US 20130087809A1
• Time in Patent Office: 509 Days
• Field of Search: 32476201-7621, 438 14- 18, 257/48
• US Class Current: 324/762.08
• CPC Class Codes: H01L 21/02378 Silicon carbide
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/32 the imperfections being within the semiconductor body
• CPC Class Codes: H01L 29/66068 the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
• CPC Class Codes: H01L 29/73 Bipolar junction transistors
• CPC Class Codes: H01L 29/732 Vertical transistors

Abstract

A method of manufacturing a silicon carbide (SiC) bipolar junction transistor (BJT) and a SiC BJT are provided. The SiC BJT comprises an emitter region, a base region and a collector region. The collector region is arranged on a substrate having an off-axis orientation of about 4 degrees or lower. Further, a defect termination layer (DTL) is arranged between the substrate and the collector region. A thickness and a doping level of the DTL are configured to terminate basal plane dislocations in the DTL and reduce the growth of defects from the DTL to the collector region. At least some of the embodiments are advantageous in that SiC BJTs with improved stability are provided. Further, a method of evaluating the degradation performance of a SiC BJT is provided.

Claims

1. A method of manufacturing a silicon carbide, SiC, bipolar junction transistor, comprising:

forming a collector region on a substrate having an off-axis orientation less than or equal to approximately 4 degrees; and

forming a defect termination layer disposed between the substrate and the collector region,

the defect termination layer having a thickness in a range of approximately 12 to 30 micrometers for terminating basal plane dislocations in the defect termination layer and having a doping level in a range of approximately 3×

10¹⁸ to 2×

10¹⁹ cm<sup>−

3</sup>.

2. The method of claim 1, wherein the off-axis orientation of the substrate is in a range of approximately 2 to 4 degrees.

3. The method of claim 1, wherein the doping level of the defect termination layer is in a range of approximately 5×

10¹⁸ to 1×

10¹⁹ cm<sup>−

3</sup>.

4. The method of claim 1, wherein the forming of the defect termination layer includes epitaxial growth of SiC on top of the substrate, the doping level of the defect termination layer includes a Nitrogen dopant atom.

5. A silicon carbide, SiC, bipolar junction transistor (BJT) comprising:

an emitter region,

a base region,

a collector region disposed on a substrate having an off-axis orientation less than or equal to approximately 4 degrees; and

a defect termination layer disposed between the substrate and the collector region,

the defect termination layer having a thickness in a range of approximately 12 micrometers to 30 micrometers for terminating basal plane dislocations in the defect termination layer and having a doping level in a range of approximately 3×

10¹⁸ to 2×

10¹⁹ cm<sup>−

3</sup>.

6. The SiC BJT of claim 5, wherein the off-axis orientation of the substrate is in a range of approximately 2 to 4 degrees.

7. The SiC BJT of claim 5, wherein the doping level of the defect termination layer is in a range of approximately 5×

10¹⁸ to 1×

10¹⁹ cm<sup>−

3</sup>.

8. The SiC BJT of claim 5, wherein the defect termination layer includes SiC doped with Nitrogen.

9. The SiC BJT of claim 5, further comprising a surface recombination suppression layer including a dielectric material and being formed at a sidewall of the emitter region.

10. A switch-mode electrical power conversion device comprising a SiC BJT as defined in claim 5.

11. A high power Radio-Frequency generator comprising a SiC BJT as defined in claim 5.

12. A silicon carbide, SiC, bipolar junction transistor (BJT) comprising:

an emitter region,

a base region,

a collector region disposed on a substrate having an off-axis orientation less than or equal to approximately 4 degrees; and

a defect termination layer disposed between the substrate and the collector region,

the defect termination layer having a thickness in a range of approximately 12 to 30 micrometers for terminating basal plane dislocations in the defect termination layer.

13. The SiC BJT of claim 12, wherein the off-axis orientation of the substrate is in a range of approximately 2 to 4 degrees.

14. The SiC BJT of claim 12, wherein the defect termination layer has a doping level in a range of approximately 5×

10¹⁸ to 1×

10¹⁹ cm<sup>−

3</sup>.

15. The SiC BJT of claim 12, wherein the defect termination layer has a doping level in a range of approximately 3×

10¹⁸ to 2×

10¹⁹ cm<sup>−

3</sup>.

16. The SiC BJT of claim 12, wherein the defect termination layer includes SiC doped with Nitrogen.

17. The SiC BJT of claim 12, further comprising a surface recombination suppression layer including a dielectric material and being formed at a sidewall of the emitter region.

18. A switch-mode electrical power conversion device comprising a SiC BJT as defined in claim 12.

19. A high power Radio-Frequency generator comprising a SiC BJT as defined in claim 12.