Resistor matrix offset compensation
First Claim
1. A method of measuring resistance in each of a plurality of resistors arranged in a resistor matrix, each resistor being located at a different intersection between a column conductor and a row conductor, and each resistor selectively connecting that column conductor to that row conductor with a variable resistance, the method comprising:
- applying a column conductor voltage and a row conductor voltage to determine an offset error row current of each row conductor;
scanning each row conductor to identify if that row conductor is connected to a column conductor by one of the plurality of resistors;
if that row conductor is connected to a column conductor by one of the plurality of resistors, scanning each resistor connected to that row conductor to determine if that resistor is connecting a column conductor to that row conductor; and
if that resistor is connecting a column conductor to that row conductor, outputting an offset compensated resistance of that resistor calculated from a row current measured for that resistor less the offset error row current for that row conductor.
2 Assignments
0 Petitions
Accused Products
Abstract
A method of measuring resistance in each of a plurality of resistors in a resistor matrix is provided. Each resistor is located at a different intersection between a column conductor and a row conductor. The method includes determining an offset error row current of each row conductor, scanning each row conductor to identify if that row conductor is connected to a column conductor by one of the plurality of resistors, scanning each resistor connected to that row conductor to determine if that resistor is connecting a column conductor to that row conductor, and if that resistor is connecting a column conductor to that row conductor, outputting an offset compensated resistance of that resistor calculated from the row current measured for that resistor less the offset error row current for that row conductor.
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Citations
20 Claims
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1. A method of measuring resistance in each of a plurality of resistors arranged in a resistor matrix, each resistor being located at a different intersection between a column conductor and a row conductor, and each resistor selectively connecting that column conductor to that row conductor with a variable resistance, the method comprising:
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applying a column conductor voltage and a row conductor voltage to determine an offset error row current of each row conductor; scanning each row conductor to identify if that row conductor is connected to a column conductor by one of the plurality of resistors; if that row conductor is connected to a column conductor by one of the plurality of resistors, scanning each resistor connected to that row conductor to determine if that resistor is connecting a column conductor to that row conductor; and if that resistor is connecting a column conductor to that row conductor, outputting an offset compensated resistance of that resistor calculated from a row current measured for that resistor less the offset error row current for that row conductor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A computing device, comprising:
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a resistor matrix including a plurality of resistors each being located at a different intersection between a column conductor and a row conductor, and each resistor selectively connecting that column conductor to that row conductor with a variable resistance; a measurement circuit to measure a row current of each row conductor of the resistor matrix; a scanning subsystem holding instructions executable to; apply a column conductor voltage and a row conductor voltage to determine an offset error row current for each row conductor; scan each row conductor to identify if that row conductor is connected to a column conductor by one of the plurality of resistors; if that row conductor is connected to a column conductor by one of the plurality of resistors, scan each resistor connected to that row conductor to determine if that resistor is connecting a column conductor to that row conductor; and if that resistor is connecting a column conductor to that row conductor, output an offset compensated resistance of that resistor calculated from the row current measured for that resistor less the offset error row current for that row conductor. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A computing device, comprising:
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a resistor matrix including a plurality of pressure-sensitive resistors each being located at a different intersection between a column conductor and a row conductor, and each pressure-sensitive resistor selectively connecting that column conductor to that row conductor with a variable resistance; a measurement circuit to measure a row current of each row conductor of the resistor matrix; a scanning subsystem holding instructions executable to; apply a column conductor voltage and a row conductor voltage to determine an offset error row current for a row conductor; and if a pressure-sensitive resistor is connecting a column conductor to the row conductor, output an offset compensated resistance of that pressure-sensitive resistor calculated from the row current measured for that pressure-sensitive resistor less the offset error row current for the row conductor. - View Dependent Claims (18, 19, 20)
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Specification