Apparatus, system, and method for redundant write caching

• US 8,706,968 B2
• Filed: 07/30/2010
• Issued: 04/22/2014
• Est. Priority Date: 12/06/2007
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Fusion-IO Incorporated (Western Digital Corporation)
• Inventors: Flynn, David
• Primary Examiner(s): BATAILLE, PIERRE MICHE
• Application Number:
  US12/847,952
• Publication Number:
  US 20110022801A1
• Time in Patent Office: 1,362 Days
• Field of Search: 711/103, 711/170, 711/E12.002, 711/122, 711/120, 711/162, 711/E12.024, 711/E12.021, 714/E11.101, 714/E11.1
• US Class Current: 711/120
• CPC Class Codes: G06F 11/108 Parity data distribution in semiconductor storages, e.g. in SSD
• CPC Class Codes: G06F 12/0804 with main memory updating G06F12/0806 takes precedence
• CPC Class Codes: G06F 12/0866 for peripheral storage systems, e.g. disk cache
• CPC Class Codes: G06F 13/28 using burst mode transfer, e.g. direct memory access DMA, cycle steal G06F13/32 takes precedence
• CPC Class Codes: G06F 13/4022 using switching circuits, e.g. switching matrix, connection or expansion network G06F13/4009 takes precedence
• CPC Class Codes: G06F 21/78 to assure secure storage of data address-based protection against unauthorised use of memory G06F12/14; record carriers for use with machines and with at least a part designed to carry digital markings G06K19/00
• CPC Class Codes: G06F 2211/103 Hybrid, i.e. RAID systems with parity comprising a mix of RAID types
• CPC Class Codes: G06F 2212/222 Non-volatile memory
• CPC Class Codes: G06F 2212/286 Mirrored cache memory
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays
• CPC Class Codes: G06F 9/52 Program synchronisation; Mutual exclusion, e.g. by means of semaphores
• CPC Class Codes: H04L 12/40013 Details regarding a bus controller
• CPC Class Codes: H04L 12/403 with centralised control, e.g. polling
• CPC Class Codes: H04L 67/1097 for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS]
• CPC Class Codes: H05K 7/1444 Complex or three-dimensional-arrangements; Stepped or dual mother boards

Abstract

An apparatus, system, and method are disclosed for redundant write caching. The apparatus, system, and method are provided with a plurality of modules including a write request module, a first cache write module, a second cache write module, and a trim module. The write request module detects a write request to store data on a storage device. The first cache write module writes data of the write request to a first cache. The second cache write module writes the data to a second cache. The trim module trims the data from one of the first cache and the second cache in response to an indicator that the storage device stores the data. The data remains available in the other of the first cache and the second cache to service read requests.

Claims

1. An apparatus for write caching, the apparatus comprising:

a write request module that is configured to receive a write request to store data on a non-volatile storage device;

a first cache write module that is configured to cache data of the write request to a first non-volatile solid-state storage cache;

a second cache write module that is configured to cache the data to a second non-volatile solid-state storage cache; and

a trim module that is configured to trim the data from one of the first non-volatile solid-state storage cache and the second non-volatile solid-state storage cache in response to an indicator that the non-volatile storage device stores the data, such that the data remains available in the other of the first non-volatile solid-state storage cache and the second non-volatile solid-state storage cache to service read requests.

2. The apparatus of claim 1, further comprising,

a cache selection module that selects the first non-volatile solid-state storage cache, wherein the trim module trims the data from the first non-volatile solid-state storage cache in response to the cache selection module selecting the first non-volatile solid-state storage cache;

and

a read request module that directs a subsequent read request for the data to the second non-volatile solid-state storage cache.

3. The apparatus of claim 1, further comprising a write acknowledgement module that acknowledges the write request in response to both the first cache write module storing the data to the first non-volatile solid-state storage cache and the second cache write module storing the data to the second non-volatile solid-state storage cache.

4. The apparatus of claim 1, wherein the storage device, the first cache, and the second cache each comprise a block storage interface.

5. The apparatus of claim 1, wherein the first non-volatile solid-state storage cache comprises a direct attached storage (DAS) device associated with the host device and the second non-volatile solid-state storage cache comprises an external device that is not directly associated with the host device.

6. A method for write caching, the method comprising:

detecting a write request to store data on a storage device;

writing data of the write request to a first cache;

minoring the data to a second cache; and

clearing the data from one of the first cache and the second cache in response to an indicator that the storage device stores the data, such that the data remains available in the other of the first cache and the second cache to service read requests.

7. The method of claim 6, further comprising selecting one of the first cache and the second cache according to a deterministic protocol, wherein the data is cleared in the selected one of the first cache and the second cache.

8. The method of claim 7, wherein the first cache and the second cache share a logical address space that is directly mapped to distinct physical addresses on the first cache and the second cache.

9. The method of claim 8, wherein the deterministic protocol is based on a logical address associated with the write request within the logical address space and further wherein the deterministic protocol logically stripes data between the first cache and the second cache by alternating selection of the first cache and the second cache for consecutive logical addresses such that a portion of the logical address space is assigned to the first cache and a portion of the logical address space is assigned to the second cache.

10. The method of claim 7, further comprising directing, based on the deterministic protocol, a read request for the data to the other of the first cache and the second cache that is not selected.

11. The method of claim 7, further comprising,

detecting a read request to retrieve requested data from the storage device;

determining that the requested data is not stored in either of the first cache and the second cache; and

writing the requested data to one of the first cache and the second cache according to the deterministic protocol in response to detecting that the requested data is not stored in either of the first cache and the second cache.

12. The method of claim 6, further comprising acknowledging the write request in response to writing the data to the first cache.

13. The method of claim 6, further comprising selecting one of the first cache and the second cache based on one or more cache attributes, wherein the data is cleared in the selected one of the first cache and the second cache.

14. The method of claim 6, further comprising,

reading the data from one of the first cache and the second cache;

writing the data to the storage device; and

setting the indicator that the storage device stores the data in response to successfully writing the data to the storage device.

15. The method of claim 6, wherein clearing the data in one of the first cache and the second cache is in response to a predefined event occurring after setting the indicator that the storage device stores the data.

16. The method of claim 6, further comprising,

detecting a replacement of one of the first cache and the second cache with a replacement cache;

and

minoring dirty data from a remaining one of the first cache and the second cache to the replacement cache, the dirty data comprising data that is not stored on the storage device.

17. A non-transitory storage medium comprising machine-readable instructions configured to cause a machine to perform a method for write caching, the method comprising:

identifying a write request to store data on a non-volatile storage device, the write request comprising data not stored on the storage device;

storing data of the write request to a first non-volatile solid-state storage cache;

storing the data of the write request to a second non-volatile solid-state storage cache;

selecting one of the first non-volatile solid-state storage cache and the second non-volatile solid-state storage cache according to a deterministic protocol; and

noting that the data on the selected one of the first non-volatile solid-state storage cache and the second non-volatile solid-state storage cache can be erased in response to an indicator that the non-volatile storage device stores the data, such that the data of the write request remains available in the unselected one of the first non-volatile solid-state storage cache and the second non-volatile solid-state storage cache to service read requests.

18. The storage medium of claim 17, further comprising,

determining that both the first non-volatile solid-state storage cache and the second non-volatile solid-state storage cache store the data;

persisting the data to the storage device in response to determining that both the first non-volatile solid-state storage cache and the second non-volatile solid-state storage cache store the data; and

setting the indicator that the storage device stores the data in response to persisting the data to the storage device.

19. The storage medium of claim 17, wherein noting that the data can be erased comprises sending a TRIM command to the selected one of the first non-volatile solid-state storage cache and the second non-volatile solid-state storage cache, the TRIM command comprising an address for the data, wherein the first non-volatile solid-state storage cache is selected in response to a value for the address for the data being odd and the second non-volatile solid-state storage cache is selected in response to a value for the address for the data being even.

20. The storage medium of claim 17, wherein noting that the data can be erased comprises marking the data as invalid on the selected one of the first non-volatile solid-state storage cache and the second non-volatile solid-state storage cache, wherein the selected one of the first non-volatile solid-state storage cache and the second non-volatile solid-state storage cache recovers storage capacity of physical storage media corresponding to the data in response to marking the data as invalid.