High voltage fast recovery trench diode

• US 8,710,585 B1
• Filed: 02/25/2013
• Issued: 04/29/2014
• Est. Priority Date: 02/25/2013
• Status: Active Grant

• Current Assignee: Alpha & Omega Semiconductor, Ltd.
• Original Assignee: Alpha & Omega Semiconductor, Ltd.
• Inventors: Hu, Jun, Bobde, Madhur, Yilmaz, Hamza, Padmanabhan, Karthik
• Primary Examiner(s): Dang, Trung Q
• Application Number:
  US13/776,497
• Time in Patent Office: 428 Days
• Field of Search: 257/330, 257/490, 257/594, 438/237, 438/589
• US Class Current: 257/330
• CPC Class Codes: H01L 21/02104 Forming layers deposition in general C23C; crystal growth in general C30B
• CPC Class Codes: H01L 29/0615 by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] LDD or drain offset regions H01L29/7833
• CPC Class Codes: H01L 29/0692 Surface layout
• CPC Class Codes: H01L 29/36 characterised by the concentration or distribution of impurities in the bulk material within semiconductor regions H01L29/06
• CPC Class Codes: H01L 29/66136 PN junction diodes
• CPC Class Codes: H01L 29/861 Diodes
• CPC Class Codes: H01L 29/8613 Mesa PN junction diodes

Abstract

Aspects of the present disclosure describe high voltage fast recovery trench diodes and methods for make the same. The device may have trenches that extend at least through a top P-layer and an N-barrier layer. A conductive material may be disposed in the trenches with a dielectric material lining the trenches between the conductive material and sidewalls of the trenches. A highly doped P-pocket may be formed in an upper portion of the top P-layer between the trenches. A floating N-pocket may be formed directly underneath the P-pocket. The floating N-pocket may be as wide as or wider than the P-pocket. It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Claims

1. A trench diode comprising:

an epitaxial layer of a first conductivity type;

a barrier layer of the first conductivity type formed above the top surface of the epitaxial layer;

a top-layer of a second conductivity type formed above the top surface of the barrier layer;

one or more trenches formed through the top-layer and the barrier layer, wherein the a conductive material is disposed in the trenches with a dielectric material lining the trenches between the conductive material and sidewalls of the trenches;

a contact pocket formed in an upper portion of the top-layer, wherein the contact pocket is of the second conductivity type, and wherein a doping concentration of the contact pocket is greater than a doping concentration of the top-layer;

an electrically floating pocket formed underneath the contact pocket, wherein the floating pocket is of the first conductivity type; and

an electrode configured to contact the contact pocket, the top-layer, and the conductive material.

2. The trench diode of claim 1, wherein a doping concentration of the barrier layer is larger than a doping concentration of the epitaxial layer.

3. The trench diode of claim 1, further comprising a buffer layer formed below the bottom surface of the epitaxial layer, wherein the buffer layer is of the first conductivity type.

4. The trench diode of claim 3, wherein an ohmic contact layer is formed on the bottom surface of the buffer layer.

5. The trench diode of claim 1, wherein the contact pocket is separated from one or more of the trenches by a portion of the top-layer.

6. The trench diode of claim 5, wherein the contact pocket extends in a stripe parallel to the one or more trenches.

7. The trench diode of claim 5, wherein the contact pocket is a discrete island formed between two or more trenches.

8. The trench diode of claim 7, wherein the discrete island is formed in the center of one or more trenches that form a closed cell structure.

9. The trench diode of claim 8, wherein the closed cell structure is a square structure.

10. The trench diode of claim 9, wherein the closed cell structure is a hexagonal structure.

11. The trench diode of claim 1, wherein the contact pocket is formed proximate to one of the one or more trenches.

12. The trench diode of claim 11, wherein the contact pocket extends as a stripe parallel to the one or more trenches.

13. The trench diode of claim 11, wherein the contact pocket extends as a stripe perpendicular to the one or more trenches.

14. The trench diode of claim 1, wherein the first conductivity type is N-type, and the second conductivity type is P-type.

15. A method for forming a fast recovery trench diode comprising:

forming an epitaxial layer of a first conductivity type;

forming a barrier layer of the first conductivity type above the epitaxial layer, wherein a doping concentration of the barrier layer is greater than a doping concentration of the epitaxial layer;

forming a top-layer of a second conductivity type above the barrier layer;

forming one or more trenches that extend at least through the top-layer and the barrier layer

disposing a conductive material in the one or more trenches with a dielectric material lining the trenches between the conductive material and sidewalls of the trenches;

forming a contact pocket of the second conductivity type in an upper portion of the top-layer, wherein a doping concentration of the contact pocket is greater than a doping concentration of the top-layer;

forming an electrically floating pocket of the first conductivity type underneath the contact pocket; and

forming a conductive contact layer above the top-layer, wherein the contact layer is electrically connected to the contact pocket, the top-layer, and the conductive material.

16. The method of claim 15, wherein the electrically floating pocket has a width W_F and the contact pocket has a width W_C, wherein W_F is at least as large as W_C.

17. The method of claim 16, wherein W_F is larger than W_C.

18. The method of claim 15, wherein the electrically floating pocket is formed with a first mask and the contact pocket is formed with a second mask.

19. The method of claim 15, wherein the electrically floating pocket and the contact pocket are formed with a single mask.

20. The method of claim 19, wherein the electrically floating pocket is formed with an angled ion implantation and the contact pocket is formed with a vertical ion implantation.

21. The method of claim 19, wherein the electrically floating pocket is formed with a vertical ion implantation and the contact pocket is formed with a vertical ion implantation.