Synchronous rectifier network unit circuit and method

• US 8,711,581 B2
• Filed: 01/29/2009
• Issued: 04/29/2014
• Est. Priority Date: 01/29/2009
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Fairchild Korea Semiconductor Limited (ON Semiconductor Corporation)
• Inventors: Kim, Jin-Tae, Koo, Gwan-Bon, Choi, Jinho
• Primary Examiner(s): Berhane, Adolf
• Assistant Examiner(s): Mehari, Yemane
• Application Number:
  US12/361,785
• Publication Number:
  US 20100188871A1
• Time in Patent Office: 1,916 Days
• Field of Search: 363/125, 363/127, 363 2102- 2118, 323281-290
• US Class Current: 363/21.06
• CPC Class Codes: H02M 3/33592 having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A synchronous rectifier network unit and synchronous rectifying method. The synchronous rectifier network unit includes a first body diode to which a first current flows at a first time when the first current flows to a first coil, and a first transistor which is turned on after the first body diode is conducted, and to which the first current flows, and it rectifies the first current by differently controlling the turn-off time of the first transistor according to the first current.

Claims

1. A synchronous rectifier network unit of a power converter, the synchronous rectifier network unit comprising:

a coil;

a first body diode of a first transistor, the first body diode being coupled to a terminal of the coil and to which a current flows at a first time instance when the current is generated to flow through the coil;

the first transistor coupled to the terminal of the coil and configured to turn on when the first body diode conducts; and

a rectification controller configured to rectify the current by differently controlling the turn-off time of the first transistor according to the current, the rectification controller including a current conducting detector configured to detect a time when the first body diode is conducted.

2. The synchronous rectifier network unit of claim 1, wherein when the peak value of the current becomes greater than a reference current within a predetermined period from the first time instance, the rectification controller is configured to turn on the first transistor, and the rectification controller is configured to turn off the first transistor when the current is reduced to be the same as the reference current.

3. The synchronous rectifier network unit of claim 1, wherein when the peak value of the current does not become greater than a reference current within a predetermined period from the first time instance, the rectification controller is configured to turn on the first transistor and thereafter turn the first transistor off at a time in advance to a time when the current does not flow.

4. The synchronous rectifier network unit of claim 1, wherein the rectification controller includes:

the current conducting detector configured to generate a trigger signal by detecting the time when the first body diode is conducted;

a pulse demodulator configured to receive the trigger signal and to generate a demodulation signal for controlling turn-off of the first transistor; and

a control logic unit configured to receive the trigger signal, the demodulation signal, and a detection voltage corresponding to the current, and to control turning on and off of the first transistor.

5. The synchronous rectifier network unit of claim 4, wherein the current conducting detector is configured to generate the trigger signal by using a result of comparing a voltage corresponding to a drain voltage of the first transistor with a predetermined first reference voltage.

6. The synchronous rectifier network unit of claim 4, wherein the pulse demodulator includes:

a variable current generator configured to generate a first ramp signal that is increased during a period corresponding to the trigger signal, and to generate a variable current according to the peak value of the first ramp signal; and

a demodulation signal generator configured to generate the demodulation signal by using a second ramp signal increasing with a predetermined slope according to the variable current.

7. The synchronous rectifier network unit of claim 6, wherein the demodulation signal generator is configured to generate the demodulation signal during a period from the time when the second ramp signal is increased to the time when it reaches a predetermined second reference voltage.

8. The synchronous rectifier network unit of claim 4, wherein the control logic unit is configured to turn off the first transistor according to the demodulation signal when the detection voltage does not reach a predetermined reference voltage for a predetermined period, and to turn off the first transistor at the time when the detection voltage is reduced to be the reference voltage when the detection voltage becomes greater than the reference voltage within the predetermined period.

9. A synchronous rectification method for rectifying a current flowing to a coil, comprising:

controlling the current to flow to a body diode of a transistor at a first time when the current is generated at the coil;

detecting a time when the body diode is conducted;

turning on the transistor when the body diode is conducted, and controlling the current to flow to the transistor; and

differently controlling the turn-off time of the transistor according to the current.

10. The synchronous rectification method of claim 9, wherein differently controlling the turn-off time of the transistor includes:

when the peak value of the current becomes greater than a reference current within a predetermined period from the first time, turning off the transistor when the current becomes greater than the reference current and then reduces to be the same as the reference current.

11. The synchronous rectification method of claim 9, wherein differently controlling the turn-off time of the transistor includes:

when the peak value of the current does not become greater than a reference current within a predetermined period from the first time, turning on the transistor, and turning it off at a time in advance to the time when the current does not flow.

12. The synchronous rectification method of claim 9, wherein controlling the current to flow to the transistor includes:

generating a trigger signal by detecting the time when the body diode is conducted; and

turning on the transistor in synchronization with the trigger signal.

13. The synchronous rectification method of claim 12, wherein generating the trigger signal includes generating the trigger signal by using a result of comparing a voltage corresponding to a drain voltage of the transistor with a predetermined first reference voltage.

14. The synchronous rectification method of claim 9, wherein differently controlling the turn-off time of the transistor includes:

receiving the trigger signal, and generating a demodulation signal for controlling the turn-off of the transistor; and

receiving the trigger signal, the demodulation signal, and a detection voltage corresponding to the current, and determining the on/off of the transistor.

15. The synchronous rectification method of claim 14, wherein generating the demodulation signal includes:

generating a first ramp signal increasing during a period corresponding to the trigger signal, and generating a variable current according to the peak value of the first ramp signal;

generating a second ramp signal increasing with a predetermined slope according to the variable current; and

generating the demodulation signal during a period from a time when the second ramp signal starts to be increased to a time when it reaches a predetermined second reference voltage.

16. The synchronous rectification method of claim 14, wherein determining the on/off of the transistor includes:

turning off the transistor according to the demodulation signal when the detection voltage fails to reach a predetermined reference voltage for a predetermined period; and

turning off the transistor at a time when the detection voltage is reduced to be the reference voltage when the detection voltage becomes greater than the reference voltage within the predetermined period.