Wireless processor, wireless memory, information system, and semiconductor device

• US 8,716,814 B2
• Filed: 07/07/2005
• Issued: 05/06/2014
• Est. Priority Date: 07/14/2004
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Kato, Kiyoshi, Koyama, Jun, Shionoiri, Yutaka
• Primary Examiner(s): Karimy, Timor
• Application Number:
  US11/571,859
• Publication Number:
  US 20080093454A1
• Time in Patent Office: 3,225 Days
• Field of Search: 257/316, 257/347, 257/E21.662, 257/414, 235/454
• US Class Current: 257/414
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device antennas per se H01Q
• CPC Class Codes: H01L 23/5387 Flexible insulating substrates H01L23/5388 takes precedence
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1218 with a particular composition or structure of the substrate
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/13 combined with thin-film or thick-film passive components
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The invention provides a processor obtained by forming a high functional integrated circuit using a polycrystalline semiconductor over a substrate which is sensitive to heat, such as a plastic substrate or a plastic film substrate. Moreover, the invention provides a wireless processor, a wireless memory, and an information processing system thereof which transmit and receive power or signals wirelessly. According to the invention, an information processing system includes an element forming region including a transistor which has at least a channel forming region formed of a semiconductor film separated into islands with a thickness of 10 to 200 nm, and an antenna. The transistor is fixed on a flexible substrate. The wireless processor in which a high functional integrated circuit including the element forming region is formed and the semiconductor device transmit and receive data through the antenna.

Claims

1. A wireless processor comprising:

a first antenna;

a first CPU;

a power circuit;

a first memory; and

an attaching agent,

wherein the wireless processor is attached without a wire connection on an outside of a body of a semiconductor device via the attaching agent, the semiconductor device comprising a second antenna, a second CPU, a second memory and a display, and

wherein the semiconductor device and the wireless processor transmit and receive data with each other by using the first antenna and the second antenna wirelessly, and

wherein the power circuit is configured to generate power by receiving electromagnetic waves through the first antenna and the second antenna, and supply the generated power to the first CPU and the first memory.

2. The wireless processor according to claim 1, wherein the first memory comprises an SRAM, a DRAM, or a nonvolatile memory.

4. The wireless processor according to claim 3 or 1, wherein the wireless processor is fixed over a flexible substrate.

5. The wireless processor according to claim 3 or 1, wherein a function of the wireless processor is added to the semiconductor device.

6. The wireless processor according to claim 3 or 1, wherein a processor of the semiconductor device has a different instruction set to that of the wireless processor.

3. A wireless processor comprising:

a first antenna;

a first CPU;

a power circuit; and

an attaching agent,

wherein the wireless processor is attached without a wire connection on an outside of a body of a semiconductor device via the attaching agent, the semiconductor device comprising a second antenna, a second CPU, and a display, and

wherein the semiconductor device and the wireless processor transmit and receive data with each other by using the first antenna and the second antenna wirelessly, and

wherein the power circuit is configured to generate power by receiving electromagnetic waves through the first antenna and the second antenna, and supply the generated power to the first CPU.

7. An information processing system comprising:

a body;

a semiconductor device comprising a second antenna and a second CPU provided in the body;

a display provided outside of the body; and

a wireless processor including a first antenna, a first CPU, a power circuit and an attaching agent,

wherein the semiconductor device and the wireless processor transmit and receive data with each other by using the first antenna and the second antenna wirelessly,

wherein the wireless processor is attached without a wire connection on the outside of the body of the semiconductor device via the attaching agent, and

wherein the power circuit is configured to generate power by receiving electromagnetic waves through the first antenna and the second antenna, and supply the generated power to the first CPU.

8. The information processing system according to claim 7,

wherein the semiconductor device includes a wireless processor interface, and

wherein the wireless processor and the semiconductor device transmit and receive data by using the wireless processor interface.

9. The information processing system according to claim 7, wherein a plurality of the wireless processor is provided for the one semiconductor device.

10. The information processing system according to claim 7, wherein a function of the wireless processor is incorporated in the information processing system and operated in parallel to the information processing system.

11. The information processing system according to claim 7, wherein a processor non-compatible with a processor of the semiconductor device is additionally provided by the wireless processor.

12. A wireless memory comprising:

a first antenna;

a nonvolatile memory;

a volatile memory;

a power circuit;

a memory interface; and

an attaching agent,

wherein the wireless memory is attached without a wire connection on an outside of a body of a semiconductor device via the attaching agent, the semiconductor device comprising a wireless memory driver and a display, the wireless memory driver comprising a second antenna, and

wherein the semiconductor device and the wireless memory transmit and receive data with each other by using the first antenna and the second antenna wirelessly, and

wherein the power circuit is configured to generate power by receiving electromagnetic waves through the first antenna and the second antenna, and supply the generated power to the nonvolatile memory, the volatile memory, and the memory interface.

14. The wireless memory according to claim 13 or 12, wherein the wireless memory is fixed over a flexible substrate.

15. The wireless memory according to claim 13 or 12, wherein an application software is installed in the wireless memory.

13. A wireless memory comprising:

a first antenna;

a nonvolatile memory;

a volatile memory;

a power circuit; and

an attaching agent,

wherein the wireless memory is attached without a wire connection on an outside of a body of a semiconductor device via the attaching agent, the semiconductor device comprising a wireless memory driver and a display, the wireless memory driver comprising;

a second antenna, and

wherein the semiconductor device and the wireless memory transmit and receive data with each other by using the first antenna and the second antenna wirelessly, and

wherein the power circuit is configured to generate power by receiving electromagnetic waves through the first antenna and the second antenna, and supply the generated power to the nonvolatile memory and the volatile memory.

16. An information processing system comprising:

a body;

a semiconductor device provided in the body and comprising a wireless memory driver which comprises a second antenna;

a display provided outside of the body; and

a wireless memory including a first antenna, a nonvolatile memory, a volatile memory, a power circuit and an attaching agent,

wherein the semiconductor device and the wireless memory transmit and receive data with each other by using the first antenna and the second antenna wirelessly, and

wherein the wireless memory is attached without a wire connection on the outside of the body of the semiconductor device via the attaching agent, and

wherein the power circuit is configured to generate power by receiving electromagnetic waves through the first antenna and the second antenna, and supply the generated power to the nonvolatile memory and the volatile memory.

17. The information processing system according to claim 16, wherein a plurality of the wireless memories is provided for the one semiconductor device.

18. The information processing system according to claim 16, wherein a plurality of the wireless memories is provided for the one semiconductor device, and

wherein each of the plurality of memories stores an identification number.

19. The information processing system according to claim 16, wherein an application software is installed in the wireless memory and is used by attaching the wireless memory to the semiconductor device.