×

Passive RFID system and method

  • US 8,717,147 B2
  • Filed: 09/21/2010
  • Issued: 05/06/2014
  • Est. Priority Date: 12/18/2009
  • Status: Expired due to Fees
First Claim
Patent Images

1. A reader of a passive RFID system, the reader comprising:

  • a processor dividing slots and subchannels to configure a round, recognizing subchannels that are not involved in a collision and interference by the slots, and changing a tag of the subchannels that are not involved in a collision and interference, into a sleep state;

    a transmission unit encoding a command generated through the processor, performing an amplitude jitter modulation on the encoded command, and transmitting the modulated command; and

    a reception unit acquiring and demodulating tag signals received through a plurality of subchannels by the slots, and providing the demodulated tag signals to the processor, so that the processor can recognize the subchannels that are not involved in a collision and interference, wherein the transmission unit comprises;

    a message generation unit generating a message having a command generated through the processor;

    an encoding unit encoding the message generated by the message generation unit to generate I and Q channel signals; and

    an amplitude jitter modulation unit performing an amplitude jitter modulation on the I and Q channel signals and outputting modulated signals to an antenna,wherein the amplitude jitter modulation unit comprises;

    a phase delay phase-delaying a carrier signal by 90 degrees and outputting the same;

    first and second transmission mixers mixing the I channel signal in the carrier signal and the Q channel signal in the output signal from the phase delay;

    first and second attenuators attenuating the amplitude of the output signals of the first and second transmission mixers;

    first and second adders adding an output signal from the phase delay to an output signal from the first attenuator and the carrier signal to an output signal from the second attenuator; and

    a third adder adding the output signals of the first and second adders.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×