Low power electronic system architecture using non-volatile magnetic memory
First Claim
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1. A computing system comprising:
- an internal section;
an external section coupled to the internal section;
at least one functional unit within the internal section;
a magnetoresistive random access memory (MRAM) block within the internal section and embedded in a substrate of the at least one functional unit, the MRAM block configured to store a functional state of the at least one functional unit during a standby state of the internal section; and
a volatile memory within the external section.
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Abstract
A computing system includes at least one functional unit and a magnetic random access memory (MRAM) block coupled to the at least one functional unit. The MRAM block is configured to store a functional state of the at least one functional unit during a power down state of the at least one functional unit.
32 Citations
20 Claims
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1. A computing system comprising:
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an internal section; an external section coupled to the internal section; at least one functional unit within the internal section; a magnetoresistive random access memory (MRAM) block within the internal section and embedded in a substrate of the at least one functional unit, the MRAM block configured to store a functional state of the at least one functional unit during a standby state of the internal section; and a volatile memory within the external section. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method comprising:
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receiving a standby signal within a computing system including an internal section, and an external section coupled to the internal section, the standby signal requesting the internal section, including one or more functional units, to enter a standby state during operation of the external section; responsive to receiving the standby signal, storing a first portion of a current operational state from the one or more functional units in a magnetic random access memory (MRAM) embedded in a substrate of the one or more functional units, and storing, in the MRAM, a second portion of the current operational state from the internal section; and removing power from the internal section including the one or more functional units after the current operational state is stored. - View Dependent Claims (8, 9, 10, 11, 12, 13)
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14. A system comprising:
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means for receiving a standby signal within a computing system including an internal section and an external section coupled to the internal section, the standby signal requesting the internal section, including one or more functional units, to enter a standby state during operation of the external section; responsive to the standby signal, means for storing a first portion of a current operational state of the one or more functional units in a magnetic random access memory (MRAM) embedded in a substrate of the one or more functional units, and means for storing, in the MRAM, a second portion of the current operational state from the internal section; means for removing power from the internal section, including the one or more functional units after the current operational state is stored; means for receiving a wake-up signal requesting the one or more functional units in the standby mode to enter an operating mode; responsive to the wake-up signal, means for restoring the power to the one or more functional units in the standby mode; and means for reinstating the current operational state to the one or more functional units. - View Dependent Claims (15, 16, 17, 18, 19)
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20. A computing system comprising:
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an internal section; an external section coupled to the internal section; at least one functional unit within the internal section; means for placing the internal section into a standby state during operation of the external section; and means for storing a functional state of the at least one functional unit, prior to placing the internal section into the standby state, during operation of the external section, the storing means within the internal section and embedded in a substrate of the at least one functional unit.
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Specification