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Low power electronic system architecture using non-volatile magnetic memory

  • US 8,719,610 B2
  • Filed: 09/23/2008
  • Issued: 05/06/2014
  • Est. Priority Date: 09/23/2008
  • Status: Active Grant
First Claim
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1. A computing system comprising:

  • an internal section;

    an external section coupled to the internal section;

    at least one functional unit within the internal section;

    a magnetoresistive random access memory (MRAM) block within the internal section and embedded in a substrate of the at least one functional unit, the MRAM block configured to store a functional state of the at least one functional unit during a standby state of the internal section; and

    a volatile memory within the external section.

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