Method for fabricating photo detector

• US 8,722,448 B2
• Filed: 10/30/2013
• Issued: 05/13/2014
• Est. Priority Date: 07/27/2007
• Status: Active Grant

• Current Assignee: AU Optronics Corporation
• Original Assignee: AU Optronics Corporation
• Inventors: Lin, Yu-Min, Chen, Hsin-Li, Gan, Feng-Yuan
• Primary Examiner(s): Fourson, III, George
• Assistant Examiner(s): Jean Baptiste, Wilner
• Application Number:
  US14/066,715
• Publication Number:
  US 20140051200A1
• Time in Patent Office: 195 Days
• Field of Search: 257/84, 257/292, 257/432, 257/E31.124, 257/E33.077, 438/56, 438/59, 438/90
• US Class Current: 438/59
• CPC Class Codes: G02F 1/13312 Circuits comprising photodetectors for purposes other than feedback
• CPC Class Codes: G02F 1/13338 Input devices, e.g. touch panels
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G06F 3/042 by opto-electronic means
• CPC Class Codes: G09G 2300/0408 Integration of the drivers onto the display substrate
• CPC Class Codes: G09G 2360/144 the light being ambient light
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: H01L 31/12 structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto semiconductor devices with at least one potential barrier or surface barrier adapted for light emission H01L33/00; amplifiers using electroluminescent element and photocell H03F17/00; electroluminescent light sources per se H05B33/00
• CPC Class Codes: H01L 31/145 the semiconductor device sensitive to radiation being characterised by at least one potential-jump barrier or surface barrier
• CPC Class Codes: H01L 31/18 Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof

Abstract

A photo detector and related fabricating method are disclosed. The photo detector includes a substrate, a first patterned semiconductor layer, a dielectric layer, a patterned conductive layer, an inter-layer dielectric, a second patterned semiconductor layer, two first electrodes disposed on the inter-layer dielectric and two second electrodes disposed on portions of the second semiconductor layer. The first patterned semiconductor layer having a first doping region and a second doping region is disposed on a transistor region. The dielectric layer is disposed to cover the substrate and the first semiconductor layer. The patterned conductive layer is disposed on the dielectric layer. The inter-layer dielectric having at least two openings adapted to expose the first doping region and the second doping region is disposed to cover the dielectric layer. The second patterned semiconductor layer is disposed on a photosensitive region. The first electrodes are electrically connected to the first patterned semiconductor layer.

Claims

1. A method for fabricating a photo detector, comprising:

providing a substrate having a transistor region and a photosensitive region;

forming a first patterned semiconductor layer having a first crystal state on the transistor region of the substrate, wherein the first patterned semiconductor layer comprises a first doping region and a second doping region;

covering a dielectric layer on the substrate and the first patterned semiconductor layer of the transistor region;

forming a patterned conductive layer on the dielectric layer of the transistor region and the dielectric layer of the photosensitive region;

covering an interlayer dielectric layer on the dielectric layer and the patterned conductive layer, wherein the interlayer dielectric layer comprises at least two openings to expose a portion of the first doping region and the second doping region of the first patterned semiconductor layer;

forming a second patterned semiconductor layer having a second crystal state on the photosensitive region;

forming two first electrodes on the interlayer dielectric layer and electrically connecting the first electrodes to the first patterned semiconductor layer; and

forming two second electrodes on a portion of the second patterned semiconductor layer.

2. The method of claim 1, further comprising covering a patterned passivation layer on the interlayer dielectric layer and the first and the second electrodes.

3. The method of claim 2, further comprising forming another patterned conductive layer having a first portion and a second portion on the interlayer dielectric layer of the transistor region and the interlayer dielectric layer of the photosensitive region, wherein the first portion is electrically connected to one of the first electrodes and the second portion is substantially disposed between the second electrodes.

4. The method of claim 1, further comprising forming at least one storage capacitor electrically connected to one of the first electrodes of the transistor region.