Composite hard mask with upper sacrificial dielectric layer for the patterning and etching of nanometer size MRAM devices

• US 8,722,543 B2
• Filed: 07/30/2010
• Issued: 05/13/2014
• Est. Priority Date: 07/30/2010
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Headway Technologies Incorporated
• Inventors: Belen, Rodolfo, Xiao, Rongfu, Zhong, Tom, Kula, Witold, Torng, Chyu-Jiuh
• Primary Examiner(s): Pham, Thanh V
• Application Number:
  US12/804,840
• Publication Number:
  US 20120028373A1
• Time in Patent Office: 1,383 Days
• Field of Search: 438/689, 438/691, 438/705, 438/712, 438/736, 438/738, 257/295, 257/421, 257/E21.017, 257/E21.246, 257/E21.665
• US Class Current: 438/738
• CPC Class Codes: H10N 50/01 Manufacture or treatment
• CPC Class Codes: Y10T 428/12535 with additional, spatially distinct nonmetal component
• CPC Class Codes: Y10T 428/24975 No layer or component greater than 5 mils thick
• CPC Class Codes: Y10T 428/266 of base or substrate
• CPC Class Codes: Y10T 428/31504 Composite [nonstructural laminate]
• CPC Class Codes: Y10T 428/31678 Of metal

Abstract

A composite hard mask is disclosed that prevents build up of metal etch residue in a MRAM device during etch processes that define an MTJ shape. As a result, MTJ shape integrity is substantially improved. The hard mask has a lower non-magnetic spacer, a middle conductive layer, and an upper sacrificial dielectric layer. The non-magnetic spacer serves as an etch stop during a pattern transfer with fluorocarbon plasma through the conductive layer. A photoresist pattern is transferred through the dielectric layer with a first fluorocarbon etch. Then the photoresist is removed and a second fluorocarbon etch transfers the pattern through the conductive layer. The dielectric layer protects the top surface of the conductive layer during the second fluorocarbon etch and during a substantial portion of a third RIE step with a gas comprised of C, H, and O that transfers the pattern through the underlying MTJ layers.

Claims

1. A composite hard mask used for the fabrication of a MTJ element in a MRAM device, comprising:

(a) a lower non-magnetic spacer made of a metal or metal alloy that is one of MnPt, Ru, Cu, Zr, Mg, or NiFeHf with a lower surface that contacts a free layer in a MTJ stack of layers, said non-magnetic spacer has an etch rate substantially higher than an overlying conductive layer and the MTJ stack of layers including a pinned layer and a tunnel barrier layer in a single step to define a MTJ element;

(b) a middle conductive layer that is one of Ta, TaN, TiN, and W and contacts an upper surface of said non-magnetic spacer and has an etch rate substantially higher than the non-magnetic spacer; and

(c) an upper dielectric layer that is comprised of silicon oxide, silicon nitride, silicon carbide, or silicon oxynitride and contacts an upper surface of the middle conductive layer and wherein all layers including upper dielectric layer and middle conductive layer and the lower non-magnetic spacer have a common sidewall.

2. The composite hard mask of claim 1 wherein the non-magnetic spacer has a thickness of about 50 to 500 Angstroms.

3. The composite hard mask of claim 1 wherein the conductive layer has a thickness from about 200 to 600 Angstroms.

4. The composite hard mask of claim 1 wherein the dielectric layer has a thickness between about 300 and 1200 Angstroms.

5. The composite hard mask of claim 1 wherein the lower non-magnetic spacer is made of MnPt with a thickness of about 300 Angstroms, the middle conductive layer is Ta with thickness of about 300 Angstroms, and the upper dielectric layer is silicon dioxide having a thickness of about 800 Angstroms.

6. A composite hard mask used for the fabrication of a MTJ element in a MRAM device, comprising:

(a) a lower conductive layer made of TaN, Ti, TiN, or W that contacts an upper surface of a free layer in a MTJ stack of layers and has an etch rate substantially higher than the free layer and MTJ stack of layers; and

(b) an upper dielectric layer comprised of silicon oxide, silicon nitride, silicon carbide, or silicon oxynitride that contacts an upper surface of the conductive layer and a hard mask stack including upper dielectric layer and lower conductive layer having a common sidewall, and the MTJ stack of layers including a pinned layer and a tunnel barrier layer between the free layer and pinned layer.

7. The composite hard mask of claim 6 wherein the lower conductive layer has a thickness from about 200 to 600 Angstroms.

8. The composite hard mask of claim 6 wherein the upper dielectric layer has a thickness between about 300 and 1200 Angstroms.

9. A method of forming a MTJ element in a memory device, comprising:

(a) forming a MTJ stack of layers comprising a seed layer, AFM layer, pinned layer, tunnel barrier layer, and a free layer on a substrate;

(b) forming a composite hard mask that contacts a top surface of said MTJ stack of layers, said composite hard mask is comprised of;

(1) a lower non-magnetic spacer that is one of MnPt, Ru, Cu, Zr, Mg, or NiFeHf and has an etch rate substantially higher than an overlying conductive layer in regions exposed to a subsequent MTJ etch process comprised of one or more gases having a C, H, and O composition;

(2) a middle conductive layer that is Ta, TaN, TiN, or W and contacts an upper surface of said non-magnetic spacer and has an etch rate substantially higher than the non-magnetic spacer during a fluorocarbon etch process used to transfer a pattern in an overlying dielectric layer through the middle conductive layer; and

(3) an upper dielectric layer comprised of silicon oxide, silicon nitride, silicon carbide, or silicon oxynitride that contacts an upper surface of the middle conductive layer and protects the middle conductive layer during the fluorocarbon etch process and during at least a substantial portion of the MTJ etch process comprised of one or more gases having a C, H, and O composition;

(c) sequentially coating a bottom anti-reflective coating (BARC) and a photoresist layer on an upper surface of the upper dielectric layer, and then patterning said photoresist layer to form a plurality of features having MTJ easy-axis and hard-axis dimensions;

(d) transferring said plurality of features through the upper dielectric layer with a first reactive ion etch (RIE) step comprised of a fluorocarbon gas;

(e) removing said photoresist layer and BARC with an oxygen ashing step;

(f) transferring said plurality of features through the middle conductive layer with a second fluorocarbon RIE step to generate a hard mask stack including an upper dielectric layer and underlying conductive layer having a common sidewall; and

(g) transferring said plurality of features through the non-magnetic spacer and MTJ stack of layers with a third RIE step comprised of one or more gases with a C, H, and O composition, said third RIE step completely removes the upper dielectric layer, and the middle conducting layer and non-magnetic spacer have a common sidewall.

10. The method of claim 9 wherein the lower non-magnetic metallic spacer has a thickness of about 50 to 500 Angstroms.

11. The method of claim 9 wherein the middle conductive layer has a thickness from about 200 to 600 Angstroms.

12. The method of claim 9 wherein the dielectric layer has a thickness between about 300 and 1200 Angstroms.

13. The method of claim 9 wherein the first and second RIE steps are comprised of CF₄, C₂F₆, C₄F₈, CHF₃, or CH₂F₂, a RF source power between about 200 to 600 Watts, a RF bias power from about 20 to 80 Watts, and a fluorocarbon flow rate of about 30 to 80 standard cubic centimeters per minute (sccm).

14. The method of claim 9 wherein the third RIE step is comprised of CH₃OH, C₂H₅OH, or CO/NH₃.

15. The method of claim 14 wherein CH₃OH is selected for the third RIE step and has a pressure of about 3 mTorr, a flow rate between about 10 and 30 sccm, a source RF power of about 800 to 1800 Watts, and a bias RF power of about 500 to 1500 Watts.

16. A method of forming a MTJ element in a memory device, comprising:

(a) forming a MTJ stack of layers comprising a seed layer, AFM layer, pinned layer, tunnel barrier layer, and a free layer on a substrate;

(b) forming a composite hard mask that contacts a top surface of said MTJ stack of layers, said composite hard mask is comprised of;

(1) a lower conductive layer that is one of TaN, Ti, TiN, or W and has an etch rate substantially higher than the free layer and MTJ stack of layers during a subsequent fluorocarbon etch process used to transfer a pattern in an overlying dielectric layer through the conductive layer, and said lower conductive layer has an etch rate substantially lower than the MTJ stack of layers during a subsequent MTJ etch process that transfers the pattern through the MTJ stack of layers; and

(2) an upper dielectric layer comprised of silicon oxide, silicon nitride, silicon carbide, or silicon oxynitride that contacts an upper surface of the conductive layer and protects the lower conductive layer during the fluorocarbon etch process and during at least a substantial portion of a MTJ etch process used to transfer the pattern through the free layer and the MTJ stack of layers;

(c) sequentially coating a bottom anti-reflective coating (BARC) and a photoresist layer on an upper surface of the upper dielectric layer, and then patterning said photoresist layer to form a plurality of features having MTJ easy-axis and hard-axis dimensions;

(d) transferring said plurality of features through the upper dielectric layer with a first RIE step comprised of a fluorocarbon gas;

(e) removing said photoresist layer and BARC with an oxygen ashing step;

(f) transferring said plurality of features through the lower conductive layer with a second fluorocarbon RIE step to define a hard mask stack including upper dielectric layer and lower conductive layer having a common sidewall; and

(g) transferring said plurality of features through the MTJ stack of layers with a third RIE step comprised of one or more gases with a C, H, and O composition, said third RIE step completely removes the upper dielectric layer.

17. The method of claim 16 wherein the lower conductive layer has a thickness from about 200 to 600 Angstroms.

18. The method of claim 16 wherein the dielectric layer has a thickness between about 300 and 1200 Angstroms.

19. The method of claim 16 wherein the first and second RIE steps are comprised of CF₄, C₂F₆, C₄F₈, CHF₃, or CH₂F₂, a RF source power between about 200 to 600 Watts, a RF bias power from about 20 to 80 Watts, and a fluorocarbon flow rate of about 30 to 80 standard cubic centimeters per minute (sccm).

20. The method of claim 16 wherein the third RIE step is comprised of CH₃OH, C₂H₅OH, or CO/NH₃.