Printed circuit board, design method thereof and mainboard of terminal product

• US 8,723,047 B2
• Filed: 03/21/2008
• Issued: 05/13/2014
• Est. Priority Date: 03/23/2007
• Status: Active Grant

• Current Assignee: Huawei Technologies Co., Ltd. (Huawei Investment & Holding Co., Ltd.)
• Original Assignee: Huawei Technologies Co., Ltd. (Huawei Investment & Holding Co., Ltd.)
• Inventors: Wei, Konggang, Shen, Xiaolan, Ye, Qingsong
• Primary Examiner(s): Dinh, Tuan T
• Assistant Examiner(s): Sawyer, Steven T
• Application Number:
  US12/053,142
• Publication Number:
  US 20080230258A1
• Time in Patent Office: 2,244 Days
• Field of Search: 174/251, 174/262, 174/263, 174/264
• US Class Current: 174/251
• CPC Class Codes: G06F 1/16 Constructional details or arrangements
• CPC Class Codes: H05K 1/0218 by printed shielding conductors, ground planes or power plane H05K1/0236 takes precedence
• CPC Class Codes: H05K 1/025 Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance H05K1/024 and H05K1/0243 take precedence; for semiconductor devices H01L23/66
• CPC Class Codes: H05K 1/0298 Multilayer circuits
• CPC Class Codes: H05K 1/115 Via connections; Lands around holes or via connections H05K1/112 takes precedence
• CPC Class Codes: H05K 1/116 Lands, clearance holes or other lay-out details concerning the surrounding of a via
• CPC Class Codes: H05K 2201/0191 wherein the thickness of the dielectric plays an important role
• CPC Class Codes: H05K 2201/0715 provided by an outer layer of PCB
• CPC Class Codes: H05K 2201/09536 Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
• CPC Class Codes: H05K 2201/09627 Special connections between adjacent vias, not for grounding vias

Abstract

A printed circuit board and a design method thereof are disclosed. The design method includes: wiring signal lines on an area basis at inner layers adjacent to outer surface layers; arranging the outer surface layers with no wiring or few wirings and interconnecting the outer surface layers by way of through vias, so that the outer surface layers function as a primary ground; and setting parameters of a line width and a layer height to control a target impedance value. The printed circuit board includes outer surface layers and two inner layers therebetween. The inner layers adjacent to the outer surface layers are used for arranging signal lines on an area basis; and the outer surface layers are arranged with no wiring or few wirings and are interconnected as a primary ground through vias. The invention also discloses a mainboard of a terminal product using the printed circuit board.

Claims

1. A method of forming a printed circuit board comprising:

wiring signal lines on an area basis at a plurality of inner layers;

arranging each of a plurality of outer surface layers of the printed circuit board with a metal sheet, wherein each of the outer surface layers is disposed on an outer surface of the printed circuit board;

interconnecting the outer surface layers by at least one through via, so that the outer surface layers function as a primary ground; and

setting parameters of line width and layer height to control a target impedance value,

wherein the printed circuit board does not include a ground plane at any of the inner layers,

wherein an interlayer distance between two adjacent inner layers is at least twice a distance from each of the two adjacent inner layers to a corresponding one of the outer surface layers closest to the inner layer,

wherein the printed circuit board comprises at least three base plates and the outer surface layers and the inner layers are formed on surfaces of the base plates, and

wherein radio frequency signal lines, power signal lines, clock signal lines and audio signal lines are arranged at the inner layer adjacent to one of the outer surface layers, and the outer surface layer is on a keyboard arrangement side.

2. A method of forming a printed circuit board comprising:

wiring signal lines on an area basis at a plurality of inner layers;

arranging each of a plurality of outer surface layers of the printed circuit board with a metal sheet, wherein each of the outer surface layers is disposed on an outer surface of the printed circuit board;

interconnecting the outer surface layers by at least one through via, so that the outer surface layers function as a primary ground; and

setting parameters of line width and layer height to control a target impedance value,

wherein the printed circuit board does not include a ground plane at any of the inner layers,

wherein an interlayer distance between two adjacent inner layers is at least twice a distance from each of the two adjacent inner layers to a corresponding one of the outer surface layers closest to the inner layer,

wherein the printed circuit board comprises at least three base plates and the outer surface layers and the inner layers are formed on surfaces of the base plates, and

wherein radio frequency signal lines, data buses and multimedia signal lines are arranged at the inner layer adjacent to one of the outer surface layers, and the outer surface layer is on a device arrangement side.

3. The method of forming a printed circuit board according to claim 2, wherein:

the data buses and the multimedia signal lines are clustered by categories and wired by clusters.