Integrated circuit package system with input/output expansion

• US 8,723,302 B2
• Filed: 12/11/2008
• Issued: 05/13/2014
• Est. Priority Date: 12/11/2008
• Status: Active Grant

• Current Assignee: Stats Chippac Pte. Ltd. (JCET Group Co., Ltd.)
• Original Assignee: Stats Chippac BVI limited (JCET Group Co., Ltd.)
• Inventors: Chandra, Harry, Carson, Flynn
• Primary Examiner(s): Trinh, Hoa B
• Application Number:
  US12/333,298
• Publication Number:
  US 20100148344A1
• Time in Patent Office: 1,979 Days
• Field of Search: 257685-686, 257/690, 257/693, 257777-779, 257/E23.169, 438107-109
• US Class Current: 257/686
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/06135 Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/4824 Connecting between the body and an opposite side of the item with respect to the body
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73207 Bump and wire connectors
• CPC Class Codes: H01L 2224/73215 Layer and wire connectors
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2225/0651 Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06517 Bump or bump-like direct electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06558 the devices having passive surfaces facing each other, i.e. in a back-to-back arrangement
• CPC Class Codes: H01L 2225/06562 at least one device in the stack being rotated or offset
• CPC Class Codes: H01L 2225/1023 the support being an insulating substrate
• CPC Class Codes: H01L 2225/1058 : Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 23/3128 : the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/49816 : Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/50 : for integrated circuit devices, e.g. power bus, number of leadsH01L23/482 - H01L23/498 take precedence
• CPC Class Codes: H01L 23/5385 : Assembly of a plurality of insulating substrates
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15151 : the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
• CPC Class Codes: H01L 2924/15159 : Side view
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/207 : Diameter ranges

Abstract

An integrated circuit package system includes: forming a base stacking package including: fabricating a base substrate, mounting an integrated circuit on the base substrate, positioning an input/output expansion substrate, having access ports around an inner array area, over the integrated circuit, and injecting a molding compound on the base substrate, the integrated circuit, and the input/output expansion substrate; and mounting a top package on the input/output expansion substrate.

Claims

1. A method of manufacture of an integrated circuit package system comprising:

forming a base stacking package including;

fabricating a base substrate,

mounting an integrated circuit on the base substrate, the integrated circuit directly connected electrically to the base substrate,

positioning an input/output expansion substrate, having access ports around an inner array area, over the integrated circuit, and

injecting a molding compound on the base substrate, the integrated circuit, and the input/output expansion substrate; and

mounting a top package on the input/output expansion substrate.

2. The method as claimed in claim 1 further comprising providing a recessed step on the access ports in the input/output expansion substrate.

3. The method as claimed in claim 1 further comprising mounting a second integrated circuit between the base substrate and the input/output expansion substrate.

4. The method as claimed in claim 1 further comprising coupling an interposer interconnect between the base substrate and the input/output expansion substrate.

5. The method as claimed in claim 1 wherein positioning the input/output expansion substrate including mounting an internal stacking module over the integrated circuit.

6. A method of manufacture of an integrated circuit package system comprising:

forming a base stacking package including;

fabricating a base substrate having a system side and a component side,

mounting an integrated circuit on the base substrate including coupling an electrical interconnect, a chip interconnect, or a combination thereof for electrically connecting the integrated circuit directly to the base substrate,

positioning an input/output expansion substrate, having access ports around an inner array area, over the integrated circuit including applying an adhesive between the integrated circuit and the input/output expansion substrate, and

injecting a molding compound on the base substrate, the integrated circuit, and the input/output expansion substrate including encapsulating the electrical interconnect, the chip interconnect, or the combination thereof; and

mounting a top package on the input/output expansion substrate including coupling a top package integrated circuit to the integrated circuit, a system interconnect on the system side of the base substrate, or a combination thereof through the input/output expansion substrate.

7. The method as claimed in claim 6 further comprising providing a recessed step on the access ports in the input/output expansion substrate including forming a bonding contact thereon.

8. The method as claimed in claim 6 further comprising mounting a second integrated circuit between the base substrate and the input/output expansion substrate including coupling a recessed step to the integrated circuit, the second integrated circuit, the component side of the base substrate, or a combination thereof.

9. The method as claimed in claim 6 further comprising coupling an interposer interconnect between the base substrate and the input/output expansion substrate including mounting a discrete component on the input/output expansion substrate for conditioning a signal between the base substrate and the input/output expansion substrate.

10. The method as claimed in claim 6 wherein positioning the input/output expansion substrate including mounting an internal stacking module over the integrated circuit including mounting an internal stacking module package body on the integrated circuit by the adhesive.

11. An integrated circuit package system including:

a base stacking package including;

a base substrate,

an integrated circuit on the base substrate, the integrated circuit directly connected electrically to the base substrate,

an input/output expansion substrate, with access ports around an inner array area, over the integrated circuit, and

a molding compound on the base substrate, the integrated circuit, and the input/output expansion substrate; and

a top package on the input/output expansion substrate.

12. The system as claimed in claim 11 further comprising a recessed step on the access ports in the input/output expansion substrate.

13. The system as claimed in claim 11 further comprising a second integrated circuit between the base substrate and the input/output expansion substrate.

14. The system as claimed in claim 11 further comprising an interposer interconnect between the base substrate and the input/output expansion substrate.

15. The system as claimed in claim 11 wherein the input/output expansion substrate includes an internal stacking module over the integrated circuit.

16. The system as claimed in claim 11 further comprising:

a system side and a component side on the base substrate;

an electrical interconnect, a chip interconnect, or a combination thereof between the integrated circuit and the base substrate;

an adhesive between the integrated circuit and the input/output expansion substrate; and

a mold cap formed on the input/output expansion substrate.

17. The system as claimed in claim 16 further comprising a recessed step on the access ports in the input/output expansion substrate includes a bonding contact thereon.

18. The system as claimed in claim 16 further comprising a second integrated circuit between the base substrate and the input/output expansion substrate includes a recessed step having the bonding contact coupled to the integrated circuit, the second integrated circuit, component side of the base substrate, or a combination thereof.

19. The system as claimed in claim 16 further comprising an interposer interconnect between the base substrate and the input/output expansion substrate includes a discrete component on the input/output expansion substrate for conditioning a signal between the base substrate and the input/output expansion substrate.

20. The system as claimed in claim 16 wherein the input/output expansion substrate over the integrated circuit includes an internal stacking module over the integrated circuit with an internal stacking module package body mounted on the integrated circuit by the adhesive.