Trench metal oxide semiconductor field effect transistor with embedded schottky rectifier using reduced masks process

• US 8,723,317 B2
• Filed: 09/14/2012
• Issued: 05/13/2014
• Est. Priority Date: 09/14/2012
• Status: Active Grant

• Current Assignee: Force Mos Technology Co., Ltd.
• Original Assignee: Force Mos Technology Co., Ltd.
• Inventors: Hsieh, Fu-Yuan
• Primary Examiner(s): Tran, Long K
• Assistant Examiner(s): Tran, Dzung
• Application Number:
  US13/616,384
• Publication Number:
  US 20140077290A1
• Time in Patent Office: 606 Days
• Field of Search: 257/330, 257/302, 257/332, 257/737
• US Class Current: 257/737
• CPC Class Codes: H01L 21/26586 characterised by the angle between the ion beam and the crystal planes or the main crystal surface
• CPC Class Codes: H01L 29/0623 Buried supplementary region, e.g. buried guard ring multi-RESURF H01L29/0634
• CPC Class Codes: H01L 29/0869 Shape cell layout H01L29/0696
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/404 Multiple field plate structures
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/456 on silicon
• CPC Class Codes: H01L 29/47 Schottky barrier electrodes H01L29/435 takes precedence
• CPC Class Codes: H01L 29/66666 Vertical transistors H01L29/66712, H01L29/66742 take precedence
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/872 Schottky diodes
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A trench MOSFET with embedded schottky rectifier having at least one anti-punch through implant region using reduced masks process is disclosed for avalanche capability enhancement and cost reduction. The source regions have a higher doping concentration and a greater junction depth along sidewalls of the trenched source-body contacts than along adjacent channel regions near the gate trenches.

Claims

1. A trench MOSFET with embedded schottky rectifier, comprising:

a substrate of a first conductivity type;

an epitaxial layer of said first conductivity type onto said substrate, wherein said epitaxial layer has a lower doping concentration than said substrate;

a plurality of gate trenches formed in said epitaxial layer and filled with a conductive material padded by a gate oxide layer;

a plurality of body regions of a second conductivity type formed in an upper portion of said epitaxial layer and between two adjacent said gate trenches;

a plurality of source regions of said first conductivity type formed near a top surface of said body regions and flanking said gate trenches in an active area;

a plurality of trenched source-body contacts formed in an active area, each filled with a contact metal plug, penetrating through said source regions and said body regions and extending into said epitaxial layer, wherein said trenched source-body contacts have a depth shallower than said gate trenches but deeper than said body regions; and

at least one anti-punch through implant region formed along at least a portion of sidewalls of said trenched source-body contacts and below said source regions;

wherein said source regions have a higher doping concentration and a greater junction depth along sidewalls of said trenched source-body contacts than along adjacent channel regions near said gate trenches at a same distance from the top surface of said epitaxial layer.

2. The trench MOSFET of claim 1, wherein said at least one anti-punch through implant region comprises a first anti-punch through implant region of said second conductivity type along an upper portion of sidewalls of said trenched source-body contacts below said source regions, wherein said first anti-punch through implant region has a higher doping concentration than said body regions.

3. The trench MOSFET of claim 1, wherein said at least one anti-punch through implant region comprises:

a first anti-punch through implant region of said second conductivity type along an upper portion of sidewalls of said trenched source-body contacts below said source regions, wherein said first anti-punch through implant region has a higher doping concentration than said body regions; and

a second anti-punch through implant region surrounding bottoms and a lower portion of sidewalls of said trenched source-body contacts below said first anti-punch through implant region, wherein said second anti-punch through implant region has either said first or said second conductivity doping type.

4. The trench MOSFET of claim 1, wherein said gate oxide layer has oxide thickness along bottom equal to or thinner than along sidewalls of said gate trenches.

5. The trench MOSFET of claim 1, wherein said gate oxide layer has greater thickness along bottoms than along sidewalls of said gate trenches.

6. The trench MOSFET of claim 1, wherein said conductive material in said gate trenches has a top surface not higher than said source regions.

7. The trench MOSFET of claim 1, wherein said conductive material in said gate trenches has a top surface higher than said source regions to form terrace gate structure.

8. The trench MOSFET of claim 1 further comprising at least a doped island region of said second conductivity type formed below the bottoms of said trenched source-body contacts and between every two adjacent gate trenches in said epitaxial layer for drain-source leakage current reduction.

9. The trench MOSFET of claim 1 further comprising at least one gate contact trench used for gate connection to a gate metal via a trenched gate contact, wherein said trenched gate contact has a depth substantially same as or deeper than said trenched source-body contacts.

10. The trench MOSFET of claim 1 further comprising at least one gate contact trench used for gate connection to a gate metal via a trenched gate contact, wherein said trenched gate contact has a depth shallower than said trenched source-body contacts.

11. The trench MOSFET of claim 1 further comprising a termination area including multiple trenched floating gates spaced apart from each other by said body regions, wherein said trenched floating gates have floating voltage.