Electrically interconnected stacked die assemblies

• US 8,723,332 B2
• Filed: 05/20/2008
• Issued: 05/13/2014
• Est. Priority Date: 06/11/2007
• Status: Active Grant

• Current Assignee: Vertical Circuits Solutions, Inc.
• Original Assignee: Invensas Corporation
• Inventors: McElrea, Simon J. S., Andrews, Lawrence Douglas Jr., McGrath, Scott, Caskey, Terrence, Crane, Scott Jay, Robinson, Marc E., Cantillep, Loreto
• Primary Examiner(s): Trinh, Hoa B
• Application Number:
  US12/124,077
• Publication Number:
  US 20080303131A1
• Time in Patent Office: 2,184 Days
• Field of Search: 257/686, 257/685, 257/778, 257/777, 257779-782, 257/784, 257/E23.001
• US Class Current: 257/777
• CPC Class Codes: H01L 2224/24011 Deposited, e.g. MCM-D type
• CPC Class Codes: H01L 2224/24145 the bodies being stacked
• CPC Class Codes: H01L 2224/24226 the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48095 Kinked
• CPC Class Codes: H01L 2224/48145 the bodies being stacked
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/76155 Jetting means, e.g. ink jet
• CPC Class Codes: H01L 2224/82102 using jetting, e.g. ink jet
• CPC Class Codes: H01L 2225/06524 Electrical connections formed on device or on substrate, e.g. a deposited or grown layer
• CPC Class Codes: H01L 2225/06551 Conductive connections on the side of the device
• CPC Class Codes: H01L 2225/06555 Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
• CPC Class Codes: H01L 2225/06562 at least one device in the stack being rotated or offset
• CPC Class Codes: H01L 24/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 24/25 of a plurality of high density interconnect connectors
• CPC Class Codes: H01L 24/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 25/50 Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01038 : Strontium [Sr]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/14 : Integrated circuits

Abstract

In die stack assembly configurations successive die in the stack are offset at a die edge at which die pads are situated, and the die are interconnected by electrically conductive traces. In some embodiments the electrically conductive traces are formed of an electrically conductive polymer. An electrically insulative conformal coating is provided having openings at die pads that are electrically connected.

Claims

1. A stacked die assembly, comprising a plurality of die stacked one over another, each die having a front side and a back side and sidewalls, wherein adjacent die in the stack are provided with interconnect pads arranged at the front side along a die margin, and wherein the die edge at the margin of a first die is offset in relation to the margin of a second die, and wherein interconnect pads on the die are electrically connected by continuous traces of an electrically conductive material each on a portion of a surface of at least one said die, wherein the electrically conductive material comprises an electrically conductive polymer.

2. The stacked die assembly of claim 1 wherein at least one of the die is provided with an electrical insulation over at least the portions of the die surface on which the conductive traces are situated.

3. The stacked die assembly of claim 1 wherein at least one of the die is provided with an electrically insulative conformal coating over at least the portions of the die surface on which the conductive traces are situated.

4. The stacked die assembly of claim 1 wherein at least one of the die is provided with an electrically insulative conformal coating over at least the front surface and the sidewalls adjacent the die margin on which the interconnect pads are arranged.

5. The stacked die assembly of claim 1 wherein at least one of the die is provided with a single continuous electrically insulative conformal coating over the front surface, the back surface, and the sidewall surfaces of the die.

6. The stacked die assembly of claim 3 wherein the material of the conformal coating includes an organic polymer.

7. The stacked die assembly of claim 6 wherein the organic polymer is a polymer of p-xylene or a derivative thereof.

8. The stacked die assembly of claim 6 wherein the organic polymer is a polyxylylene polymer.

9. The stacked die assembly of claim 6 wherein the organic polymer is a parylene.

10. The stacked die assembly of claim 9 wherein the organic polymer is one of a parylene C, or a parylene N, or a parylene A, or a parylene SR.

11. The stacked die assembly of claim 3 wherein the conformal coating is formed by deposition.

12. The stacked die assembly of claim 11 wherein the conformal coating is formed by vapor deposition.

13. The stacked die assembly of claim 11 wherein the conformal coating is formed by liquid phase deposition.

14. The stacked die assembly of claim 11 wherein the conformal coating is formed by solid phase deposition.

15. The stacked die assembly of claim 1 wherein the interconnect material is a curable conductive epoxy.

16. The stacked die assembly of claim 1 wherein the interconnect material is applied using an application tool.

17. The stacked die assembly of claim 1 wherein the interconnect material is applied using a syringe.

18. The stacked die assembly of claim 1 wherein the interconnect material is applied using a nozzle.

19. The stacked die assembly of claim 1 wherein the interconnect material is applied using a needle.

20. The stacked die assembly of claim 16 wherein the material is extruded from the tool in a continuous flow.

21. The stacked die assembly of claim 16 wherein the material exits the tool dropwise.

22. The stacked die assembly of claim 1 wherein a plurality of the interconnect traces is formed in a single operation.

23. The stacked die assembly of claim 22 wherein the application tool comprises a plurality of needles or nozzles ganged together.

24. The stacked die assembly of claim 1 wherein the interconnect traces are formed by printing.

25. The stacked die assembly of claim 1 wherein the interconnect traces are formed by printing from a print head.

26. The stacked die assembly of claim 1 wherein the interconnect traces are formed by screen printing.

27. The stacked die assembly of claim 1 wherein the interconnect traces are formed by printing through a mask or stencil.

28. A mounted die stack, comprising the stacked die assembly of claim 1 electrically interconnected with circuitry in a device for use.

29. The mounted die stack of claim 28 wherein the stacked die assembly is interconnected such that the active side of the die faces toward the underlying circuitry.

30. The mounted die stack of claim 28 wherein the stacked die assembly is interconnected such that the front side of the die faces toward the underlying circuitry.

36. The stacked die assembly of claim 1 wherein the stack is provided with an electrically insulative conformal coating formed on the die stack.

37. The stacked die assembly of claim 36 wherein the conformal coating is formed in a space between vertically adjacent die, providing adhesion between the die.

38. The stacked assembly of claim 36 wherein the conformal coating is formed over at least the portions of a die surface over which the conductive traces are situated.

31. A stack of die comprising a plurality of die, each die having interconnect pads situated in a margin along at least a first die edge, wherein interconnect pads on a first die are electrically connected by respective traces of an electrically conductive polymer or an electrically conductive ink to interconnect pads on a second die, the traces extending continuously between the interconnect pads of the first and second dies and overlying a sidewall of at least one of the first and second dies.

32. The die stack of claim 31, having a stairstep configuration, wherein the first and second dies are adjacent to one another.

33. The die stack of claim 32 wherein the traces are made over the steps.

34. The die stack of claim 31 wherein each die has an X-dimension greater than a Y-dimension, and wherein the first die edge a narrower die edge, wherein succeeding die in the stack are oriented at 90°

in relation to vertically adjacent die below or above.

35. The die stack of claim 34 wherein corresponding overlying pads are connected by a vertical interconnect.