On-chip power-down generation for LDO-based mutual capacitance touchscreen controllers

• US 8,723,855 B2
• Filed: 11/29/2011
• Issued: 05/13/2014
• Est. Priority Date: 11/29/2011
• Status: Active Grant

• Current Assignee: PixArt Imaging Incorporated
• Original Assignee: PixArt Imaging Incorporated
• Inventors: Rai, Abhay Kumar, Brosnan, Michael John
• Primary Examiner(s): Sasinowski, Andrew
• Application Number:
  US13/306,954
• Publication Number:
  US 20130135245A1
• Time in Patent Office: 896 Days
• Field of Search: 345173-176, 345/204, 345/212, 178/18.06, 713/324, 713/320
• US Class Current: 345/212
• CPC Class Codes: G06F 1/3262 Power saving in digitizer or tablet
• CPC Class Codes: G06F 3/04164 Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
• CPC Class Codes: G06F 3/04166 Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184
• CPC Class Codes: G06F 3/0443 using a single layer of sensing electrodes

Abstract

Various embodiments of methods and devices are provided for a mutual capacitance touchscreen controller comprising a first on-chip low drop out regulator (LDO) configured to receive and regulate as a first input thereto an input supply voltage (VSUPPLY), and to provide as an output therefrom a first regulated output voltage (VDDA). A first comparator in the controller is configured to receive as first and second inputs thereto VSUPPLY and VDDA and to provide as an output therefrom a signal EN, EN being provided to the first LDO as a second input thereto. The first LDO is configured to operate in a first off mode and is turned off by signal EN when the difference between VSUPPLY and VDDA is less than a predetermined threshold.

Claims

1. A mutual capacitance touchscreen controller, comprising:

an analog core comprising touchscreen sense circuitry configured to be operably connected to capacitive touchscreen sense lines external to the controller;

a first on-chip low drop out regulator (LDO) configured to receive and regulate as a first input thereto an input supply voltage (VSUPPLY), and to provide as an output therefrom a first regulated output voltage (VDDA);

a first comparator configured to receive as first and second inputs thereto VSUPPLY and VDDA and to provide as an output therefrom a signal EN, EN being provided to the first LDO as a second input thereto;

wherein the first LDO is configured to operate in a first off mode and is turned off by signal EN when the difference between VSUPPLY and VDDA is less than a predetermined threshold, and the touchscreen controller is configured to operate in an LDO mode wherein VDDA is provided as an output from the first LDO when the difference between VSUPPLY and VDDA is greater than or equal to the predetermined threshold and the first LDO is turned on and operating in a second on mode.

2. The touchscreen controller of claim 1, wherein VSUPPLY ranges between about 2.5 volts and about 3.6 volts.

3. The touchscreen controller of claim 1, wherein VDDA ranges between about 1.75 volts and about 1.8 volts.

4. The touchscreen controller of claim 1, wherein the difference between VSUPPLY and VDDA ranges between about 0.7 volts and about 1.8 volts.

5. The touchscreen controller of claim 1, wherein the predetermined threshold ranges between about 0.2 volts and about 0.7 volts.

6. The touchscreen controller of claim 1, wherein the analog core is operably connected to VDDA.

7. The touchscreen controller of claim 1, further comprising a second LDO arranged electrically in parallel with the first LDO and configured to receive signal EN from the first LDO as a first input thereto and to receive VSUPPLY as a second input thereto, the second LDO further being configured to operate in a third on mode and provide a voltage VDDD as an output therefrom when the first LDO is operating in the second on mode.

8. The touchscreen controller of claim 7, further comprising a digital core operably connected to the VDDD output of the second LDO.

9. The touchscreen controller of claim 7, further comprising a third LDO arranged electrically in parallel with the first and second LDOs and configured to receive signal EN from the first LDO as a first input thereto and to receive VSUPPLY as a second input thereto, the third LDO further being configured to operate in a fourth on LDO mode and provide a voltage VDDRV as an output therefrom when the first LDO is operating in the second on mode.

10. The touchscreen controller of claim 1, wherein the first LDO comprises PMOS field effect transistors.

11. The touchscreen controller of claim 1, further comprising drive circuitry operably connected to touchscreen drive lines external to the controller.

12. A method of operating a mutual capacitance touchscreen controller, comprising:

providing an analog core comprising touchscreen sense circuitry configured to be operably connected to capacitive touchscreen sense lines external to the controller;

providing an input supply voltage (VSUPPLY) to a first on-chip low drop out regulator (LDO) as a first input thereto and generating a regulated output voltage VDDA therefrom;

providing VSUPPLY and VDDA to a comparator and generating as an output therefrom a signal EN, EN being provided to the first LDO as a second input thereto;

operating the first LDO in a first off mode where the first LDO is turned off by signal EN when the difference between VSUPPLY and VDDA is less than a predetermined threshold;

operating the touchscreen controller in an LDO mode when the difference between VSUPPLY and VDDA is greater than or equal to the predetermined threshold and the first LDO is turned on and operating in a second on mode.

13. The method of claim 12, wherein VSUPPLY ranges between about 2.5 volts and about 3.6 volts.

14. The method of claim 12, wherein VDDA ranges between about 1.75 volts and about 1.8 volts.

15. The method of claim 12, wherein the difference between VSUPPLY and VDDA ranges between about 0.7 volts and about 1.8 volts.

16. The method of claim 12, wherein the predetermined threshold ranges between about 0.2 volts and about 0.7 volts.

17. The method of claim 12, wherein the analog core is operably connected to VDDA and the first input of the LDO.

18. The method of claim 12, wherein a second LDO is arranged electrically in parallel with the first LDO and configured to receive signal EN from the first LDO as a first input thereto and to receive VSUPPLY as a second input thereto.

19. The method of claim 18, further comprising operating the second LDO in a third on mode and providing a voltage VDDD as an output therefrom when the first LDO is operating in the second on mode.

20. The method of claim 19, wherein a third LDO is arranged electrically in parallel with the first and second LDOs and configured to receive signal EN from the first LDO as a first input thereto and to receive VSUPPLY as a second input thereto.

21. The method of claim 20, further comprising operating the third LDO in a fourth on LDO mode and providing a voltage VDDRV as an output therefrom when the first LDO is operating in the second on mode.