Virtual buffer interface methods and apparatuses for use in wireless devices
First Claim
Patent Images
1. A method comprising:
- in response to at least one memory access request from at least one of a plurality of client processes specifying at least one virtual address associated with at least one of a plurality of virtual buffers, generating at least one physical address associated with a memory based, at least in part, on said at least one virtual address, said at least one of a plurality of virtual buffers being capable of operatively serving a plurality of client processes; and
accessing at least a portion of said memory operatively associated with said at least one physical address, said accessing comprising performing either a data packing operation as part of a write operation or a data unpacking operation as part of a read operation, said data packing and/or said data unpacking being based at least in part on a word bit width associated with said at least one of said plurality of client processes.
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Abstract
Techniques are provided which may be implemented in various methods and/or apparatuses that to provide a virtual buffer interface capability between a plurality of processes/engines and a memory pool.
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Citations
54 Claims
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1. A method comprising:
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in response to at least one memory access request from at least one of a plurality of client processes specifying at least one virtual address associated with at least one of a plurality of virtual buffers, generating at least one physical address associated with a memory based, at least in part, on said at least one virtual address, said at least one of a plurality of virtual buffers being capable of operatively serving a plurality of client processes; and accessing at least a portion of said memory operatively associated with said at least one physical address, said accessing comprising performing either a data packing operation as part of a write operation or a data unpacking operation as part of a read operation, said data packing and/or said data unpacking being based at least in part on a word bit width associated with said at least one of said plurality of client processes. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. An apparatus comprising:
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memory; and a virtual buffer interface coupled to said memory and comprising; a plurality of virtual buffers, wherein at least one of said plurality of virtual buffers is configured to provide an interface to said memory for a plurality of client processes by generating at least one physical address associated with said memory based, at least in part, on at least one virtual address as identified by at least one of said plurality of client processes, access at least a portion of said memory associated with said at least one physical address, and based, at least in part, on a word bit width associated with said at least one of said plurality of client processes perform at least one of;
a data packing operation, and/or a data unpacking operation. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30)
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31. An apparatus comprising:
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means for obtaining at least one memory access request from at least one of a plurality of client processes said memory access request specifying at least one virtual address associated with at least one of a plurality of virtual buffers; means for generating at least one physical address associated with a memory based, at least in part, on said at least one virtual address; means for accessing at least a portion of said memory associated with said at least one physical address; and at least one of; means for performing a data packing operation as part of a write operation based, at least in part, on a word bit width associated with said at least one of said plurality of client processes; and
/ormeans for performing a data unpacking operation as part of a read operation based, at least in part, on said word bit width associated with said at least one of said plurality of client processes. - View Dependent Claims (32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42)
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43. An article comprising:
a non-transitory computer-readable medium having stored thereon computer-implementable instructions executable by at least one processing unit to; obtain at least one memory access request from at least one of a plurality of client processes, said memory access request specifying at least one virtual address associated with at least one of said plurality of virtual buffers; generate at least one physical address associated with a memory based, at least in part, on said at least one virtual address, said at least one of said plurality of virtual buffers being capable of operatively serving a plurality of client processes; and initiate access of at least a portion of said memory associated with said at least one physical address, said access comprising at least one of a data packing operation that is performed as part of a write operation, or a data unpacking operation that is performed as part of a read operation, wherein said data packing and/or said data unpacking being based at least in part on a word bit width associated with said at least one of said plurality of client processes. - View Dependent Claims (44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54)
Specification