Thread transition management

• US 8,725,993 B2
• Filed: 02/23/2011
• Issued: 05/13/2014
• Est. Priority Date: 02/23/2011
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Abernathy, Christopher M., Brown, Mary D., Eisen, Susan E., Kahle, James A., Le, Hung Q., Nguyen, Dung Q.
• Primary Examiner(s): Faherty, Corey S
• Application Number:
  US13/032,737
• Publication Number:
  US 20120216004A1
• Time in Patent Office: 1,175 Days
• Field of Search: None
• US Class Current: 712/220
• CPC Class Codes: G06F 9/30101 Special purpose registers
• CPC Class Codes: G06F 9/30123 according to context, e.g. thread buffers
• CPC Class Codes: G06F 9/3013 according to data content, e.g. floating-point registers, address registers
• CPC Class Codes: G06F 9/384 Register renaming
• CPC Class Codes: G06F 9/3851 from multiple instruction streams, e.g. multistreaming
• CPC Class Codes: G06F 9/461 Saving or restoring of program or task context

Abstract

Various systems, processes, products, and techniques may be used to manage thread transitions. In particular implementations, a system and process for managing thread transitions may include the ability to determine that a transition is to be made regarding the relative use of two data register sets and determine, based on the transition determination, whether to move thread data in at least one of the data register sets to second-level registers. The system and process may also include the ability to move the thread data from at least one data register set to second-level registers based on the move determination.

Claims

1. A method comprising:

determining that a transition is to be made regarding the relative use of two data register sets, wherein the transition is from a mode in which the data register sets contain mirrored data to one in which they contain different data;

determining, based on the transition determination, whether to move thread data in at least one of the data register sets to non-register memory allocated to serve as registers; and

moving the thread data from at least one data register set to the non-register memory based on the move determination.

2. The method of claim 1, further comprising:

determining whether starting at least one additional thread is associated with the transition;

determining the identity of active threads to transition to the second data register set based on an additional thread not starting;

moving the data for the identified threads from a data register set to the non-register memory based on the identifying determination; and

moving the identified thread data to the second data register set.

3. The method of claim 2, wherein moving the identified thread data to the second data register set is performed based on use of the thread data.

4. A system comprising:

a computer memory;

two data register sets coupled to the computer memory; and

a processor coupled to the two data register sets, the processor adapted to;

determine that a transition is to be made regarding the relative use of the data register sets, wherein the transition is from a mode in which the data register sets contain mirrored data to one in which they contain different data;

determine, based on the transition determination, whether to move thread data in at least one of the data register sets to a portion of the computer memory, the portion comprising non-register memory that is allocated to serve as registers; and

move the thread data from at least one data register set to the non-register memory portion based on the move determination.

5. The system of claim 4, wherein the processor is further adapted to:

determine whether starting at least one additional thread is associated with the transition;

determine the identity of active threads to transition to the second data register set based on an additional thread not starting;

move the data for the identified threads from a data register set to the non-register memory portion based on the identifying determination; and

move the identified thread data to the second data register set.

6. The system of claim 5, wherein the processor is further adapted to move the identified thread data to the second data register set based on use of the thread data.