Configurable logic integrated circuit having a multidimensional structure of configurable elements
First Claim
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1. A configurable logic integrated circuit device comprising:
- a plurality of configurable elements arranged in a two-dimensional structure;
the plurality of configurable elements are interconnected by a configurable interconnection;
at least one dedicated interface unit connecting at least some of the configurable elements via the configurable interconnection to a memory internal to the configurable logic integrated circuit adapted for storing data to be processed by one or more of the plurality of configurable elements according to a configuration of the one or more of the plurality of configurable elements;
wherein;
each of some of the plurality of configurable elements comprising;
a plurality of data processing units that are configurable via at least one data processing function—
wherein;
each of at least some of the plurality of configurable elements is a logic element that is dedicated to logic processing and includes a logic processing unit;
each of at least some of the plurality of configurable elements is a data processing element that is configurable by at least one data processing function and that includes at least one arithmetic logic unit (ALU) for data processing; and
each of at least some of the plurality of configurable elements is a memory element that includes a memory for storing data to be processed as one or more operands by one or more of the plurality of configurable elements according to a configuration of the one or more of the plurality of configurable elements to produce a result, wherein the memory element includes at least one dual port memory and includes a FIFO mode; and
the configurable logic integrated circuit device is a Field Programmable Gate Array (FPGA).
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Abstract
Programming of modules which can be reprogrammed during operation is described. Partitioning of code sequences is also described.
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Citations
23 Claims
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1. A configurable logic integrated circuit device comprising:
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a plurality of configurable elements arranged in a two-dimensional structure; the plurality of configurable elements are interconnected by a configurable interconnection; at least one dedicated interface unit connecting at least some of the configurable elements via the configurable interconnection to a memory internal to the configurable logic integrated circuit adapted for storing data to be processed by one or more of the plurality of configurable elements according to a configuration of the one or more of the plurality of configurable elements; wherein; each of some of the plurality of configurable elements comprising; a plurality of data processing units that are configurable via at least one data processing function—
wherein;each of at least some of the plurality of configurable elements is a logic element that is dedicated to logic processing and includes a logic processing unit; each of at least some of the plurality of configurable elements is a data processing element that is configurable by at least one data processing function and that includes at least one arithmetic logic unit (ALU) for data processing; and each of at least some of the plurality of configurable elements is a memory element that includes a memory for storing data to be processed as one or more operands by one or more of the plurality of configurable elements according to a configuration of the one or more of the plurality of configurable elements to produce a result, wherein the memory element includes at least one dual port memory and includes a FIFO mode; and the configurable logic integrated circuit device is a Field Programmable Gate Array (FPGA). - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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Specification