System for multi threaded multi processor sharing of asynchronous hardware units

• US 8,726,279 B2
• Filed: 05/06/2006
• Issued: 05/13/2014
• Est. Priority Date: 05/06/2006
• Status: Active Grant

• Current Assignee: NVIDIA Corporation
• Original Assignee: NVIDIA Corporation
• Inventors: Avkarogullari, Gokhan, Petersen, Steven L.
• Primary Examiner(s): Cao, Diem
• Assistant Examiner(s): Huaracha, Willy W
• Application Number:
  US11/382,025
• Publication Number:
  US 20070261053A1
• Time in Patent Office: 2,929 Days
• Field of Search: 718/100, 718/101, 718/102, 718/104, 718/107, 718/1, 710/200
• US Class Current: 718/100
• CPC Class Codes: G06F 9/526 Mutual exclusion algorithms

Abstract

Methods and system for sharing a hardware resource in a computer system running at least one software process having multiple threads. A lock_indicator is provided in data structures within the computer system. A request is received to use the hardware resource by one of the threads that is defined to be a requesting tread. Based on the lock_indicator, it is determined whether the hardware resource is available for use by the requesting thread. If this indicates that the hardware resource is available, the lock_indicator is set under control of the hardware resource to instead indicate that the hardware resource is unavailable, and a go_indicator signals to indicate that use of the hardware resource for the request can now proceed.

Claims

1. In a computer system, a method of sharing a hardware resource between a plurality of threads, said method comprising:

accessing a request to use said hardware resource, said request received from a first thread of said plurality of threads;

determining, based upon a first portion of a data structure, whether said hardware resource is available for use by said first thread;

if said hardware resource is determined to be available for use by said first thread;

said first thread setting said first portion of said data structure to indicate that said hardware resource is unavailable for use by a second thread of said plurality of threads; and

said first thread setting a second portion of said data structure to signal that said hardware resource is ready for use by said first thread; and

if said hardware resource is determined to be unavailable for use by said first thread;

causing said first thread to wait until said hardware resource is available for use by said first thread; and

in response to said hardware resource becoming available, setting said first portion of said data structure to indicate that said hardware resource is available, wherein said setting said first portion to indicate that said hardware resource is available is performed by a hardware aspect of said computer system, wherein said hardware aspect includes said hardware resource.

2. The method of claim 1, wherein said data structure further comprises a third portion operable to store at least one thread identity value, said method further comprising:

if said hardware resource is determined to be unavailable for use by said first thread, then said hardware aspect adding a first thread identity value associated with said first thread to said third portion of said data structure.

3. The method of claim 2, wherein said adding said first thread identity value is performed atomically with respect to said plurality of threads.

4. The method of claim 2, wherein said data structure further comprises a fourth portion, said method further comprising:

responsive to completing said request;

said hardware aspect setting said fourth portion of said data structure to signal to said first thread that said request is completed; and

said hardware aspect resetting said first portion of said data structure to indicate that said hardware resource is available for use by at least one of said plurality of threads.

5. The method of claim 4, further comprising:

a software of aspect of said computer system determining, based upon said fourth portion of said data structure, whether said hardware resource has completed said request, said software aspect comprising said computer system'"'"'s operating system.

6. The method of claim 5, wherein said third portion of said data structure comprises a priority-ordered list of waiting threads, said list maintained by said software aspect.

7. The method of claim 4 further comprising:

responsive to said setting said fourth portion, determining if a second thread of said plurality of threads is waiting to access said hardware resource; and

if said second thread is waiting to access said hardware resource;

said hardware aspect generating an interrupt; and

said software aspect signaling said second thread to proceed with accessing said hardware resource.

8. The method of claim 7, wherein said determining said second thread, said generating said interrupt, and said signaling said second thread are performed atomically with respect to said plurality of threads, and wherein said determining if said second thread is waiting and said generating said interrupt are further performed atomically under control of said hardware aspect.

9. The method of claim 4, wherein said setting said fourth portion and said resetting said first portion are performed atomically with respect to said plurality of threads.

10. The method of claim 2, wherein said causing said first thread to wait further comprises causing said first thread to wait using a semaphore.

11. In a computer system, a hardware locking system for sharing a hardware resource between a plurality of threads, said hardware locking system comprising:

a memory comprising a data structure;

means for accessing a request to use said hardware resource, said request received from a first thread of said plurality of threads;

means for determining, based upon a first portion of said data structure, whether said hardware resource is available for use by said first thread;

said first thread setting, if said hardware resource is determined to be available for use by said first thread, said first portion of said data structure to indicate that said hardware resource is unavailable for use by a second thread of said plurality of threads;

said first thread setting, if said hardware resource is determined to be available for use by said first thread, a second portion of said data structure signal to indicate that said hardware resource is ready for use by said first thread;

means for causing said first thread to wait until said hardware resource is available for use by said first thread if said hardware resource is determined to be unavailable for use by said first thread; and

a hardware aspect setting, in response to said hardware resource becoming available, said first portion of said data structure to indicate that said hardware resource is available, wherein said hardware aspect includes said hardware resource.

12. The hardware locking system of claim 11, wherein said data structure further comprises a third portion operable to store at least one thread identity value, wherein, if said hardware resource is determined to be unavailable for use by said first thread, then said hardware aspect adds a first thread identity value associated with said first thread to said second portion of said data structure.

13. The hardware locking system of claim 12, wherein said data structure further comprises a fourth portion, said hardware locking system further comprising:

said hardware aspect setting, responsive to completing said request, said fourth portion of said data structure to signal to said first thread that said request is completed; and

said hardware aspect resetting, responsive to completing said request, said first portion of said data structure to indicate that said hardware resource is available for use by at least one of said plurality of threads.

14. The hardware locking system of claim 13, further comprising:

a software aspect determining, based upon said fourth portion of said data structure, whether said hardware resource has completed said request, said software aspect comprising said computer system'"'"'s operating system.

15. The hardware locking system of claim 13 further comprising:

said hardware aspect determining if a second thread of said plurality of threads is waiting to access said hardware resource;

said hardware aspect generating, if said second thread is waiting to access said hardware resource, an interrupt; and

said software aspect signaling, if said second thread is waiting to access said hardware resource, said second thread to proceed with accessing said hardware resource.

16. The hardware locking system of claim 15, wherein said setting said fourth portion of said data structure, said resetting, and said determining if said second thread is waiting are performed atomically with respect to said plurality of threads.