Microchips with an internal hardware firewall that by its location leaves unprotected microprocessors or processing units which performs processing with a network

• US 8,726,303 B2
• Filed: 01/31/2011
• Issued: 05/13/2014
• Est. Priority Date: 11/29/1996
• Status: Expired due to Fees

• Current Assignee: Frampton E. Ellis III
• Original Assignee: Frampton E. Ellis III
• Inventors: Ellis, Frampton E. III
• Primary Examiner(s): STRANGE, AARON N
• Application Number:
  US13/018,089
• Publication Number:
  US 20120030748A1
• Time in Patent Office: 1,198 Days
• Field of Search: 709/201, 709/220, 709/250, 726/11
• US Class Current: 725/11
• CPC Class Codes: G06F 15/16 Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs coordinating program control therefor G06F9/52; in regulating and control system G05B
• CPC Class Codes: G06F 21/71 to assure secure computing or processing of information
• CPC Class Codes: G06F 9/5072 Grid computing
• CPC Class Codes: H04L 43/00 Arrangements for monitoring or testing data switching networks
• CPC Class Codes: H04L 43/0817 by checking functioning
• CPC Class Codes: H04L 43/0852 Delays
• CPC Class Codes: H04L 63/02 for separating internal from external traffic, e.g. firewalls
• CPC Class Codes: H04L 63/0209 Architectural arrangements, e.g. perimeter networks or demilitarized zones
• CPC Class Codes: H04L 67/10 in which an application is distributed across nodes in the network software deployment G06F8/60; multiprogramming arrangements G06F9/46
• CPC Class Codes: H04L 69/14 Multichannel or multilink protocols
• CPC Class Codes: H04L 69/329 in the application layer [OSI layer 7]
• CPC Class Codes: H04L 9/40 Network security protocols

Abstract

A microchip comprising an internal hardware firewall located between a protected portion of the microchip that is protected by the internal hardware firewall and a network portion that is configured to connect to a network of computers. The internal hardware firewall is configured to deny access to the protected portion from the network. The microchip may also include one or more of a network communications, graphics, video, sound, hard drive, optical disk drive and flash memory component in the network portion and one or many microprocessors that are not network communications components and are in the network portion and are separate from the internal hardware firewall. The location of the internal hardware firewall permits unrestricted access by the network to the network portion so that processing operations other than network communications and firewall operations conducted by the microchip with the network are executed by the microprocessors in the network portion.

Claims

1. A microchip, comprising:

a microprocessor configured to be a master controlling device of said computer;

an internal hardware firewall located between a protected portion of said microchip that is protected by said internal hardware firewall and a network portion of said microchip, said network portion being configured to connect to a network of computers including the World Wide Web and/or the Internet;

said internal hardware firewall is configured to deny access to at least said protected portion of said microchip from said network; and

network communications components located in said network portion of said microchip; and

one or more or at least two or four or eight or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors that are not network communications components, wherein said one or more microprocessors are located in said network portion of said microchip and are separate from said internal hardware firewall; and

wherein the location of said internal hardware firewall permits unrestricted access by said network of computers to said network portion of said microchip so that processing operations other than network communications and firewall operations conducted by said microchip with the network of computers are executed by one or more of said microprocessors in said network portion of said microchip.

2. The microchip of claim 1, further comprising at least one microprocessor located in said protected portion of said microchip;

and

wherein said at least one microprocessor located in said protected portion of said microchip is separate from said internal hardware firewall and said internal hardware firewall is also configured to deny access to said at least at least one microprocessor located in said protected portion of said microchip by a network.

3. The microchip of claim 2, further comprising at least a non-volatile memory located in said protected portion of said microchip.

4. The microchip of claim 3, wherein one said microprocessor located in said protected portion of said microchip is configured to be a master controlling device of said microchip.

5. The microchip of claim 1, wherein said one or more microprocessors located in said network portion of said computer are not firewall components.

6. The microchip of claim 2, wherein the microchip is configured for a personal computer configured for control by an individual personal user.

7. A microchip, comprising:

an internal hardware firewall located between a protected portion of said microchip that is protected by said internal hardware firewall and a network portion of said microchip, said network portion being configured to connect to a network of computers;

at least one graphics component located in said network portion of the microchip;

one or more or at least two or four or eight or 16 or 32 or 64 or 128 or 256 or 512 or 1024 processing units located in said network portion of said microchip, wherein said one or more processing units and said at least one graphics component are separate from each other and are each separate from said internal hardware firewall.

8. The microchip of claim 7, further comprising at least one processing unit located in said protected portion of said microchip;

and

wherein said at least one processing unit located in said protected portion of said microchip is separate from said internal hardware firewall and said internal hardware firewall is also configured to deny access to said at least one processing unit located in said protected portion of said microchip by a network.

9. The microchip of claim 8, wherein said at least one processing unit located in said protected portion of said microchip includes a master controlling device for the microchip.

10. The microchip of claim 7, wherein at least one network communications component is located in said network portion of the microchip and is separate from said internal hardware firewall and said at least one graphics component.

11. The microchip of claim 7, wherein at least one video component is located in said network portion of the microchip and is separate from said internal hardware firewall and said at least one graphics component.

12. The microchip of claim 7, wherein at least one sound component is located in said network portion of the microchip and is separate from said internal hardware firewall and said at least one graphics component.

13. The microchip of claim 7, wherein at least one flash memory component is located in said network portion of the microchip and is separate from said internal hardware firewall and said at least one graphics component.

14. The microchip of claim 7, wherein said internal hardware firewall is configured to deny access to at least said protected portion of said microchip from said network.

15. The microchip of claim 7, further comprising a microprocessor configured to be a master controlling device of said microchip.

16. The microchip of claim 15, wherein the microprocessor configured to be a master controlling device of said microchip is located in said protected portion of said microchip.

46. The microchip of claim 14, wherein the microprocessor configured to be a master controlling device of said microchip is located in said protected portion of said microchip.

17. A microchip configured for a personal computer configured for control by an individual personal user to communicate with a network, said microchip comprising:

an internal hardware firewall configured so that one or more or at least two or four or eight or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors of the microchip are not protected by said internal hardware firewall; and

said one or more microprocessors that are not protected by said internal hardware firewall are separate from network communications components and said internal hardware firewall;

said internal hardware firewall is configured to deny access to at least one protected portion of said microchip from said network; and

said internal hardware firewall is configured by its location to permit unrestricted access by the network to said one or more microprocessors that are not protected by said internal hardware firewall, so that processing operations controlled by said personal user, other than network communication and firewall operations, that are conducted by said computer microchip with the network are executed by one or more said microprocessors that are not protected by said internal hardware firewall.

18. The microchip of claim 17, wherein said one or more microprocessors of the computer that are not protected by said internal hardware firewall are not firewall components.

19. The microchip of claim 17, wherein the microchip comprises a microprocessor configured to be a master controlling device of said microchip.

20. The microchip of claim 19, wherein the microprocessor configured to be a master controlling device of said microchip is located in said protected portion of said microchip.

21. The microchip of claim 17, further comprising a microprocessor located in the protected portion is configured to be a master controlling device of said microchip.

22. A microchip, comprising:

an internal hardware firewall located between a protected portion of said microchip that is protected by said internal hardware firewall and a network portion of said microchip, said network portion being configured to connect to a network of computers;

said internal hardware firewall is configured to deny access to at least said protected portion of said microchip from said network;

one or more or at least two or four or eight or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors located in said network portion of said microchip, wherein said one or more microprocessors located in said network portion are separate from network communications components and said internal hardware firewall; and

at least one graphics component is located in said network portion of the microchip and is separate from said internal hardware firewall; and

wherein the location of said internal hardware firewall permits unrestricted access by said network of computers to said network portion of said microchip so that processing operations conducted by said microchip with the network of computers are executed by one or more said microprocessors in said network portion of said microchip and by said at least one graphics component in said network portion of said microchip.

23. The microchip of claim 22, further comprising a microprocessor configured to be a master controlling device of said microchip located in said protected portion of said microchip.

24. The microchip of claim 22, comprising a microprocessor configured to be a master controlling device of said microchip.

25. A microchip, comprising:

an internal hardware firewall located between a protected portion of said microchip that is protected by said internal hardware firewall and a network portion of said microchip, said network portion being configured to connect to a network of computers;

said internal hardware firewall is configured to deny access to at least said protected portion of said microchip from said network;

one or more or at least two or four or eight or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors located in said network portion of said microchip, wherein said one or more microprocessors located in said network portion are separate from network communications components and said internal hardware firewall; and

at least one video component is located in said network portion of the microchip and is separate from said internal hardware firewall; and

wherein the location of said internal hardware firewall permits unrestricted access by said network of computers to said network portion of said microchip so that processing operations conducted by said microchip with the network of computers are executed by one or more said microprocessors in said network portion of said microchip and by said at least one video component in said network portion of said microchip.

26. The microchip of claim 25, further comprising a microprocessor configured to be a master controlling device of said microchip located in said protected portion of said microchip.

27. The microchip of claim 25, comprising a microprocessor configured to be a master controlling device of said microchip.

28. A microchip, comprising:

an internal hardware firewall located between a protected portion of said microchip that is protected by said internal hardware firewall and a network portion of said microchip, said network portion being configured to connect to a network of computers;

said internal hardware firewall is configured to deny access to at least said protected portion of said microchip from said network;

one or more or at least two or four or eight or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors located in said network portion of said microchip, wherein said one or more microprocessors located in said network portion are separate from network communications components and said internal hardware firewall; and

at least one sound component is located in said network portion of the microchip and is separate from said internal hardware firewall; and

wherein the location of said internal hardware firewall permits unrestricted access by said network of computers to said network portion of said microchip so that processing operations conducted by said microchip with the network of computers are executed by one or more said microprocessors in said network portion of said microchip and by said at least one sound component in said network portion of said microchip.

29. The microchip of claim 28, further comprising a microprocessor configured to be a master controlling device of said microchip located in said protected portion of said microchip.

30. The microchip of claim 28, comprising a microprocessor configured to be a master controlling device of said microchip.

31. A microchip, comprising:

an internal hardware firewall located between a protected portion of said microchip that is protected by said internal hardware firewall and a network portion of said microchip, said network portion being configured to connect to a network of computers;

said internal hardware firewall is configured to deny access to at least said protected portion of said microchip from said network;

one or more or at least two or four or eight or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors located in said network portion of said microchip, wherein said one or more microprocessors located in said network portion are separate from network communications components and said internal hardware firewall; and

at least one hard drive component is located in said network portion of the microchip and is separate from said internal hardware firewall; and

wherein the location of said internal hardware firewall permits unrestricted access by said network of computers to said network portion of said microchip so that processing operations conducted by said microchip with the network of computers are executed by one or more said microprocessors in said network portion of said microchip using said at least one hard drive component in said network portion of said microchip.

32. The microchip of claim 31, further comprising a microprocessor configured to be a master controlling device of said microchip located in said protected portion of said microchip.

33. The microchip of claim 31, comprising a microprocessor configured to be a master controlling device of said microchip.

34. A microchip, comprising:

an internal hardware firewall located between a protected portion of said microchip that is protected by said internal hardware firewall and a network portion of said microchip, said network portion being configured to connect to a network of computers;

said internal hardware firewall is configured to deny access to at least said protected portion of said microchip from said network;

one or more or at least two or four or eight or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors located in said network portion of said microchip, wherein said one or more microprocessors located in said network portion are separate from network communications components and said internal hardware firewall; and

at least one optical disk drive component is located in said network portion of the microchip and is separate from said internal hardware firewall; and

wherein the location of said internal hardware firewall permits unrestricted access by said network of computers to said network portion of said microchip so that processing operations conducted by said microchip with the network of computers are executed by one or more said microprocessors in said network portion of said microchip using said at least one optical disk drive component in said network portion of said microchip.

35. The microchip of claim 34, further comprising a microprocessor configured to be a master controlling device of said microchip located in said protected portion of said microchip.

36. The microchip of claim 34, comprising a microprocessor configured to be a master controlling device of said microchip.

37. A microchip, comprising:

an internal hardware firewall located between a protected portion of said microchip that is protected by said internal hardware firewall and a network portion of said microchip, said network portion being configured to connect to a network of computers;

said internal hardware firewall is configured to deny access to at least said protected portion of said microchip from said network;

one or more or at least two or four or eight or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors located in said network portion of said microchip, wherein said one or more microprocessors located in said network portion are separate from network communications components and said internal hardware firewall; and

at least one flash memory component is located in said network portion of the microchip and is separate from said internal hardware firewall; and

wherein the location of said internal hardware firewall permits unrestricted access by said network of computers to said network portion of said microchip so that processing operations conducted by said microchip with the network of computers are executed by one or more said microprocessors in said network portion of said microchip using said at least one flash memory component in said network portion of said microchip.

38. The microchip of claim 37, further comprising a microprocessor configured to be a master controlling device of said microchip is located in said protected portion of said microchip.

39. The microchip of claim 37, comprising a microprocessor configured to be a master controlling device of said microchip.

40. A microchip configured for a personal computer configured to communicate with a network, said microchip comprising:

an internal hardware firewall configured so that one or more or at least two or four or eight or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors of the microchip are not protected by said internal hardware firewall; and

said one or more microprocessors that are not protected by said internal hardware firewall are separate from network communications components and said internal hardware firewall;

said internal hardware firewall is configured to deny access to at least one protected portion of said microchip from said network;

said internal hardware firewall is configured by its location to permit unrestricted access by the network to said one or more microprocessors that are not protected by said internal hardware firewall, so that processing operations other than network communications and firewall operations conducted by said microchip with the network are executed by said one or more microprocessors that are not protected by said internal hardware firewall; and

said operations include network browsing functions.

41. The microchip of claim 40, wherein said network browsing functions are selected from the group consisting of World Wide Web or Internet searching, email and conferencing.

42. The microchip of claim 40, comprising a microprocessor configured to be a master controlling device of said microchip.

43. A microchip configured for a personal computer configured to communicate with a network, said personal computer comprising:

an internal hardware firewall configured so that one or more or at least two or four or eight or 16 or 32 or 64 or 128 or 256 or 512 or 1024 processing units of the microchip that are not network communications components are not protected by said internal hardware firewall; and

said one or more processing units that are not protected by said internal hardware firewall are separate from network communications components and said internal hardware firewall; and

said internal hardware firewall is configured by its location to permit unrestricted access by the network to said one or more processing units that are not protected by said internal hardware firewall, so that processing operations, other than network communications and firewall operations, that are conducted by said microchip with the network are executed by said one or more processing units that are not protected by said internal hardware firewall.

44. The microchip of claim 43, wherein said one or more processing units of the microchip that are not protected by said internal hardware firewall are not firewall components.

45. The microchip of claim 43, further comprising a microprocessor configured to be a master controlling device of said microchip.

47. The microchip of claim 43, wherein the personal computer is also configured for control by an individual user and wherein processing operations controlled by said personal user, other than network communications and firewall operations, that are conducted by said microchip with the network are executed by said one or more processing units that are not protected by said internal hardware firewall.

48. A microchip configured for a personal computer configured to communicate with a network, said personal computer comprising:

an internal hardware firewall configured so that one or more or at least two or four or eight or 16 or 32 or 64 or 128 or 256 or 512 or 1024 processing units of the microchip are not protected by said internal hardware firewall; and

said one or more processing units that are not protected by said internal hardware firewall are separate from network communications components and said internal hardware firewall;

said internal hardware firewall configured by its location to permit unrestricted access by the network to said one or more processing units, so that operations, other than network communications and firewall operations, conducted by said microchip with the network are executed by said one or more processing units that are not protected by said internal hardware firewall; and

said operations other than network communications and firewall operations include network browsing functions.

49. The microchip of claim 48, wherein said network browsing functions are selected from the group consisting of World Wide Web or Internet searching, email and conferencing.

50. The microchip of claim 48, further comprising a microprocessor configured to be a master controlling device of said microchip.

51. The microchip of claim 50, wherein the microprocessor configured to be a master controlling device of said microchip is located in said protected portion of said microchip.

52. The microchip of claim 48, wherein the personal computer is also configured for control by an individual user and wherein operations controlled by said personal user, other than network communications and firewall operations, that are conducted by said microchip with the network are executed by said one or more processing units that are not protected by said internal hardware firewall.