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Stress-generating shallow trench isolation structure having dual composition

  • US 8,728,905 B2
  • Filed: 03/14/2012
  • Issued: 05/20/2014
  • Est. Priority Date: 11/15/2007
  • Status: Active Grant
First Claim
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1. A method of fabricating a semiconductor structure comprising:

  • forming an etch stop layer on a semiconductor substrate;

    forming a shallow trench surrounding a first active area and a second active area in said semiconductor substrate;

    filling said shallow trench with a first shallow trench isolation material having a first composition and first stress-generating properties;

    forming first cavities laterally abutting lengthwise sidewalls and widthwise sidewalls of end portions of said second active area and second cavities laterally abutting lengthwise sidewalls of a middle portion of said first active area; and

    filling said first cavities and second cavities with a second shallow trench isolation material having a second composition and second stress-generating properties, wherein said first stress-generating properties and second stress-generating properties are different.

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