Method for manufacturing semiconductor device

• US 8,729,546 B2
• Filed: 07/25/2012
• Issued: 05/20/2014
• Est. Priority Date: 10/24/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Suzawa, Hideomi, Sasagawa, Shinya, Muraoka, Taiga
• Primary Examiner(s): Luu, Chuong A.
• Application Number:
  US13/557,719
• Publication Number:
  US 20120286267A1
• Time in Patent Office: 664 Days
• Field of Search: 257/43, 257/223, 257/227, 257/291, 257/292, 257/439, 257/655, 257/57, 257/59, 257/72, 257/350, 257/351, 257/347, 257/443
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. The etching step is performed by dry etching in which an etching gas is used.

Claims

1. A semiconductor device comprising:

a gate electrode layer over a substrate;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate electrode layer with the gate insulating layer therebetween, the oxide semiconductor layer comprising indium;

a source electrode layer over the oxide semiconductor layer; and

a drain electrode layer over the oxide semiconductor layer,

wherein an upper surface of the oxide semiconductor layer between the source electrode layer and the drain electrode layer is etched so that a portion of the oxide semiconductor layer is thinner than portions of the oxide semiconductor layer below the source electrode layer and the drain electrode layer, and

wherein first portions of the oxide semiconductor layer extend beyond outer side edges of the source electrode layer and the drain electrode layer, and

wherein the first portions of the oxide semiconductor layer are thinner than second portions of the oxide semiconductor layer, the second portions being below the source electrode layer and the drain electrode layer.

2. The semiconductor device according to claim 1, wherein the oxide semiconductor layer further includes gallium, and zinc.

3. The semiconductor device according to claim 1, wherein the oxide semiconductor layer is in direct contact with the source electrode layer and the drain electrode layer.

4. The semiconductor device according to claim 1, wherein the oxide semiconductor layer has an amorphous structure.

5. A semiconductor device comprising:

a gate electrode layer over a substrate;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate electrode layer with the gate insulating layer therebetween, the oxide semiconductor layer comprising indium;

a source electrode layer over the oxide semiconductor layer; and

a drain electrode layer over the oxide semiconductor layer,

a silicon oxide film over the source electrode layer and the drain electrode layer,

a silicon nitride film over the silicon oxide film,

a resin layer over the silicon nitride film,

a pixel electrode layer over the resin layer,

wherein an upper surface of the oxide semiconductor layer between the source electrode layer and the drain electrode layer is etched so that a portion of the oxide semiconductor layer is thinner than portions of the oxide semiconductor layer below the source electrode layer and the drain electrode layer, and

wherein first portions of the oxide semiconductor layer extend beyond outer side edges of the source electrode layer and the drain electrode layer,

wherein the first portions of the oxide semiconductor layer are thinner than second portions of the oxide semiconductor layer, the second portions being below the source electrode layer and the drain electrode layer.

6. The semiconductor device according to claim 5, wherein the oxide semiconductor layer further includes gallium, and zinc.

7. The semiconductor device according to claim 5, wherein the oxide semiconductor layer is in direct contact with the source electrode layer and the drain electrode layer.

8. The semiconductor device according to claim 5, wherein the oxide semiconductor layer has an amorphous structure.

9. A liquid crystal display device comprising the semiconductor device according to claim 5.

10. An electroluminescent display device comprising the semiconductor device according to claim 5.

11. The semiconductor device according to claim 5, wherein the resin layer comprises at least one selected from the group consisting of polyimide, acrylic, benzocyclobutene, polyamide, and epoxy.

12. A semiconductor device comprising:

a gate electrode layer over a substrate;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate electrode layer with the gate insulating layer therebetween, the oxide semiconductor layer comprising indium;

a source electrode layer over the oxide semiconductor layer; and

a drain electrode layer over the oxide semiconductor layer,

a silicon oxide film over the source electrode layer and the drain electrode layer,

a silicon nitride film over the silicon oxide film,

a resin layer over the silicon nitride film,

a pixel electrode layer over the resin layer,

wherein an upper surface of the oxide semiconductor layer between the source electrode layer and the drain electrode layer is etched so that a portion of the oxide semiconductor layer is thinner than portions of the oxide semiconductor layer below the source electrode layer and the drain electrode layer, and

wherein first portions of the oxide semiconductor layer extend beyond outer side edges of the source electrode layer and the drain electrode layer,

wherein the first portions of the oxide semiconductor layer are thinner than second portions of the oxide semiconductor layer, the second portions being below the source electrode layer and the drain electrode layer, and

wherein the silicon oxide film is in contact with the gate insulating layer.

13. The semiconductor device according to claim 12, wherein the oxide semiconductor layer further includes gallium, and zinc.

14. The semiconductor device according to claim 12, wherein the oxide semiconductor layer is in direct contact with the source electrode layer and the drain electrode layer.

15. The semiconductor device according to claim 12, wherein the oxide semiconductor layer has an amorphous structure.

16. A liquid crystal display device comprising the semiconductor device according to claim 12.

17. An electroluminescent display device comprising the semiconductor device according to claim 12.

18. The semiconductor device according to claim 12, wherein the resin layer comprises at least one selected from the group consisting of polyimide, acrylic, benzocyclobutene, polyamide, and epoxy.