Semiconductor package with patterning layer and method of making same
First Claim
1. A semiconductor package, comprising:
- a substrate including opposed first and second conductive patterns disposed thereon and electrically connected to each other;
at least one semiconductor die mounted to the substrate and electrically connected to the first conductive pattern thereof;
a patterning layer defining a first surface, the patterning layer at least partially encapsulating the semiconductor die and at least partially covering the first conductive pattern the second conductive pattern not being covered by the patterning layer; and
a wiring pattern embedded in the patterning layer and including a first via pattern that extends from the first surface directly to the first conductive pattern, the wiring pattern configured to directly electrically connect the semiconductor die to the first conductive pattern of the substrate, a portion of the wiring pattern being exposed in and flush with the first surface of the patterning layer; and
a protective layer on the patterning layer and completely covering and insulating the portion of the wiring pattern exposed at the first surface thereof.
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Accused Products
Abstract
In accordance with the present invention, there is provided multiple embodiments of a semiconductor package including one or more semiconductor dies which are electrically connected to an underlying substrate through the use of a conductive pattern which is at least partially embedded in a patterning layer of the package. In a basic embodiment of the present invention, the semiconductor package comprises a substrate having a conductive pattern disposed thereon. Electrically connected to the conductive pattern of the substrate is at least one semiconductor die. The semiconductor die and the substrate are at least partially encapsulated by a patterning layer. Embedded in the patterning layer is a wiring pattern which electrically connects the semiconductor die to the conductive pattern. A portion of the wiring pattern is exposed in the patterning layer.
353 Citations
10 Claims
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1. A semiconductor package, comprising:
- a substrate including opposed first and second conductive patterns disposed thereon and electrically connected to each other;
at least one semiconductor die mounted to the substrate and electrically connected to the first conductive pattern thereof;
a patterning layer defining a first surface, the patterning layer at least partially encapsulating the semiconductor die and at least partially covering the first conductive pattern the second conductive pattern not being covered by the patterning layer; and
a wiring pattern embedded in the patterning layer and including a first via pattern that extends from the first surface directly to the first conductive pattern, the wiring pattern configured to directly electrically connect the semiconductor die to the first conductive pattern of the substrate, a portion of the wiring pattern being exposed in and flush with the first surface of the patterning layer; and
a protective layer on the patterning layer and completely covering and insulating the portion of the wiring pattern exposed at the first surface thereof. - View Dependent Claims (2, 3, 4, 5, 6)
- a substrate including opposed first and second conductive patterns disposed thereon and electrically connected to each other;
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7. A semiconductor package, comprising:
a substrate including at least two conductive patterns disposed thereon in opposed relation to each other and electrically connected to each other in a prescribed manner;
a first patterning layer defining a first surface, the first patterning layer at least partially covering one of the conductive patterns, the remaining one of the conductive patterns not being covered by the first patterning layer;
a first wiring pattern embedded in the first patterning layer and directly electrically connected to the conductive pattern at least partially covered by the first patterning layer, a portion of the first wiring pattern being exposed in and flush with the first surface of the first patterning layer, wherein the first wiring pattern comprises a first via pattern extending from the first surface of the patterning layer directly to the conductive pattern at least partially covered by the first patterning layer;
a first semiconductor die electrically connected to the first wiring pattern; and
a protective layer on the patterning layer configured to insulate the portion of the first wiring pattern exposed at the first surface of the first patterning layer.- View Dependent Claims (8, 9)
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10. A semiconductor package, comprising:
a substrate including at least two conductive patterns disposed thereon and electrically connected to each other in a prescribed manner;
at least one semiconductor die mounted to the substrate and electrically connected to one of the conductive patterns thereof;
a patterning layer defining a first surface, the patterning layer at least partially encapsulating the semiconductor die and at least partially covering one of the conductive patterns, the remaining one of the conductive patterns not being covered by the patterning layer; and
a wiring pattern embedded in the patterning layer and configured to directly electrically connect the semiconductor die to the conductive pattern at least partially covered by the patterning layer, a portion of the wiring pattern being exposed in and flush with the first surface of the patterning layer; and
a protective layer on the patterning layer configured to insulate the portion of the wiring pattern exposed at the first surface of the patterning layer, and wherein the protective layer and the patterning layer comprise different materials.
Specification