Dynamic adjusting RFID demodulation circuit

• US 8,729,960 B2
• Filed: 06/06/2012
• Issued: 05/20/2014
• Est. Priority Date: 06/10/2011
• Status: Active Grant

• Current Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Ochoa, Agustin, Pishdad, Bardia
• Primary Examiner(s): KINKEAD, ARNOLD M
• Application Number:
  US13/490,285
• Publication Number:
  US 20120313698A1
• Time in Patent Office: 713 Days
• Field of Search: 329/347, 329/349, 340/572.4, 340/10.1, 375/353
• US Class Current: 329/347
• CPC Class Codes: G06K 19/0715 the arrangement including means to regulate power transfer to the integrated circuit
• CPC Class Codes: H03D 1/10 of diodes

Abstract

A dynamic adjusting RFID demodulator circuit includes an envelope detector having an input for receiving a modulated RF signal, a fixed reference generator coupled to the input of an RC filter, an RF level dependent signal path adding to the fixed reference level at higher RF energy levels, a comparator having a first input coupled to an output of the envelope detector, a second input coupled to an output of the RC filter, and an output for providing a data output signal.

Claims

1. A method of operating a dynamic adjusting RFID demodulator circuit comprising:

providing an envelope detector and an RC filter coupled to the envelope detector;

increasing a threshold of the RFID demodulator circuit in response to the power of an input modulated RF signal; and

comparing an output of the envelope detector to an output of the RC filter to provide a data output signal.

13. The method of claim 1 wherein providing an envelope detector and an RC filter coupled to the envelope detector comprises providing an envelope detector including an output diode and an output resistor through which the RC filter is coupled to the envelope detector.

14. The method of claim 1 further comprising providing a fixed reference coupled to the input of an RC filter.

15. The method of claim 1 wherein increasing the threshold of the RFID demodulator circuit comprises injecting current into the output of the RC filter at the second input to the comparator at higher power levels.

2. A dynamic adjusting RFID demodulator circuit comprising:

an envelope detector and an RC filter coupled to the envelope detector

a comparator having a first input coupled to an output of the envelope detector, a second input coupled to an output of the RC filter and an output for providing a data output signal,

wherein the comparator has a threshold corresponding to the power of an input modulated RF signal.

16. The demodulator circuit of claim 2 further comprising a fixed reference coupled to the input of an RC filter.

17. The demodulator circuit of claim 16 wherein the fixed reference comprises a current source coupled to an input of an RC filter.

18. The demodulator circuit of claim 17 wherein the fixed reference further comprises a diode-connected transistor.

19. The demodulator circuit of claim 2 wherein the envelope detector comprises an output diode.

20. The demodulator circuit of claim 2 wherein the envelope detector comprises an output resistor.

3. A dynamic adjusting RFID demodulator circuit comprising:

an envelope detector having an input for receiving a modulated RF signal;

a fixed reference coupled to the input of an RC filter; and

a comparator having a first input coupled to an output of the envelope detector, a second input coupled to an output of the RC filter, and an output for providing a data output signal.

4. The demodulator circuit of claim 3 wherein the envelope detector comprises an input diode.

5. The demodulator circuit of claim 3 wherein the envelope detector comprises a parallel resistor and capacitor circuit.

6. The demodulator circuit of claim 3 wherein the envelope detector comprises an output diode.

7. The demodulator circuit of claim 3 wherein the envelope detector comprises an output resistor.

8. The demodulator circuit of claim 3 wherein the fixed reference comprises a current source.

9. The demodulator circuit of claim 8 wherein the current source comprises a bandgap derived current source.

10. The demodulator circuit of claim 3 wherein the fixed reference comprises a diode-connected transistor.

11. The demodulator circuit of claim 10 wherein the diode-connected transistor comprises an N-channel transistor.

12. The demodulator circuit of claim 3 wherein the first input of the comparator comprises a positive input and the second input comprises a negative input.