Multi-rate filter and filtering method for digital pre-distorters
First Claim
1. A pre-distorter memory modeling apparatus, comprising:
- a plurality of branches, each branch receiving a different output basis function signal, at least one branch including;
a down-sampler, the down-sampler down-sampling the received output basis function signal received at the branch by a down-sampling factor of 1/Mk, Mk being different for each of the at least one branch and being based on an evaluation period associated with the corresponding each of the at least one branch; and
a memory structure, the memory structure receiving and filtering an output of the down-sampler, the memory structure including;
at least one delay element, at least one of the at least one delay element delaying the output of the down-sampler according to a corresponding pre-determined delay; and
a memory structure output based on an output of the at least one delay element; and
an up-sampler, the up-sampler up-sampling the memory structure output by an up-sampling factor equal to Mk.
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Abstract
A method and apparatus for modeling distortion of a non-linear device are disclosed. A pre-distorter model has a plurality of branches. Each branch receives a different output basis function signal. At least one branch includes a down-sampler, a memory structure and an up-sampler. The down-sampler down-samples the received output basis function signal received by the branch by a factor of 1/Mk, where Mk is different for each of the at least one branches. The memory structure includes at least one delay element to delay the output of the down-sampler according to a predetermined delay. The memory structure has an output based on an output of the at least one delay element. The up-sampler up-samples the output of the memory structure by the up-sampling factor, Mk.
23 Citations
18 Claims
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1. A pre-distorter memory modeling apparatus, comprising:
a plurality of branches, each branch receiving a different output basis function signal, at least one branch including; a down-sampler, the down-sampler down-sampling the received output basis function signal received at the branch by a down-sampling factor of 1/Mk, Mk being different for each of the at least one branch and being based on an evaluation period associated with the corresponding each of the at least one branch; and a memory structure, the memory structure receiving and filtering an output of the down-sampler, the memory structure including; at least one delay element, at least one of the at least one delay element delaying the output of the down-sampler according to a corresponding pre-determined delay; and a memory structure output based on an output of the at least one delay element; and an up-sampler, the up-sampler up-sampling the memory structure output by an up-sampling factor equal to Mk. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method of calculating a distortion signal, d(n), the method comprising:
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receiving an input signal, x(n); supplying the input signal, x(n), to each of K branches, where K is an integer not less than 1; in each of the K branches, operating on the input signal, x(n), by a different basis function, to produce in each branch an output signal, uk(n), where k=0 to K−
1; andin each of the K branches, applying one of the K output signals, uk(n), to a different one of K memory models, each of the K memory models; down-sampling the signal uk(n) by a factor 1/Mk, to produce a down-sampled signal, vk(n) the factor Mk of a branch of the K branches corresponding to an order of the basis function associated with the branch; filtering the down-sampled signal vk(n) by a filter including at least one delay element to produce a filtered output; up-sampling the filtered output by the factor, Mk, to produce a distortion component dk(n); and adding the outputs dk(n) of each branch to produce the distortion signal d(n). - View Dependent Claims (12, 13, 14, 15)
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16. A pre-distorter memory module, comprising:
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a combination of a register and an accumulator, the combination arranged to low-pass filter and down-sample an input signal; a filter comprising at least one delay element, the filter producing a filtered output; an interpolator, comprising; a first delay element receiving the filtered output and producing a first delay element output; a first multiplier, the first multiplier multiplying the first delay element output by a first factor, the first factor depending upon an up-sampling factor, Mk, Mk being based on an evaluation period associated with the pre-distorter memory module; a second delay element receiving the first delay element output and producing a second delay element output; a second multiplier, the second multiplier multiplying the second delay element output by a second factor; and an adder, the adder adding the output of the first multiplier and the second multiplier. - View Dependent Claims (17, 18)
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Specification