Data forwarding circuit, data forwarding method, display device, host-side device, and electronic apparatus

• US 8,732,376 B2
• Filed: 11/14/2011
• Issued: 05/20/2014
• Est. Priority Date: 11/19/2010
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Saitoh, Kohji, Uehata, Masaki, Yamato, Asahi
• Primary Examiner(s): Nam, Hyun
• Application Number:
  US13/885,806
• Publication Number:
  US 20130241859A1
• Time in Patent Office: 918 Days
• Field of Search: None
• US Class Current: 710/307
• CPC Class Codes: G06F 1/3253 Power saving in bus
• CPC Class Codes: G06F 1/3262 Power saving in digitizer or tablet
• CPC Class Codes: G06F 3/041 Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2340/0428 Gradation resolution change
• CPC Class Codes: G09G 2340/0435 Change or adaptation of the frame rate of the video stream
• CPC Class Codes: G09G 2350/00 Solving problems of bandwidth in display systems
• CPC Class Codes: G09G 2352/00 Parallel handling of streams of display data
• CPC Class Codes: G09G 2360/18 Use of a frame buffer in a display terminal, inclusive of the display panel
• CPC Class Codes: G09G 2370/08 Details of image data interface between the display device controller and the data line driver circuit
• CPC Class Codes: G09G 2370/10 Use of a protocol of communication by packets in interfaces along the display data pipeline
• CPC Class Codes: G09G 2370/14 Use of low voltage differential signaling [LVDS] for display data communication
• CPC Class Codes: G09G 3/003 to produce spatial visual effects
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/3685 Details of drivers for data electrodes
• CPC Class Codes: G09G 5/001 Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor
• CPC Class Codes: G09G 5/006 Details of the interface to the display terminal specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04
• CPC Class Codes: G09G 5/02 characterised by the way in which colour is displayed details of colour display specific for CRTs G09G1/28; specific for flat matrix panels other than liquid crystal displays G09G3/2003; specific for liquid crystal displays G09G3/3607
• CPC Class Codes: G09G 5/04 using circuits for interfacing with colour displays
• CPC Class Codes: G09G 5/18 : Timing circuits for raster scan displays specially adapted for television H04N ; synchronisation between the display unit and other display units, videodisc player G09G5/12
• CPC Class Codes: Y02D 10/00 : Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The timing controller determines the number of data lanes (11, 12, 13), which are used to transfer data, based on information in relation to an amount of data to be transferred during a predetermined time period. Out of the plurality of data lanes (11, 12, 13), the determined number of data lane(s) (11, 12, 13) are used to transfer data. Further, a data lane(s) (11, 12, 13) which is not used in the data transfer is deactivated.

Claims

1. A data transfer circuit for transferring data with use of at least one of a plurality of data lanes, said data transfer circuit comprising:

a determining device arranged to determine, based on information in relation to an amount of data to be transferred during a predetermined time period, the number of data lanes via which the data is transferred;

a transferring device arranged to transfer the data with use of a determined number of data lane(s), which number has been determined by the determining device, out of the plurality of data lanes; and

a deactivating device arranged to deactivate a data lane(s), which is not used to transfer the data, out of the plurality of data lanes, wherein

the data being indicative of an image to be displayed on a display panel,

one vertical period to display the image being (i) a transfer period during which the data is transferred to a receiver circuit or (ii) a halt period during which the data is not transferred,

the information defines the transfer period and the halt period,

the determining device sets the number of data lanes to zero during the halt period, and

said data transfer circuit is provided in a display device and serves as a timing controller arranged to transfer data, which is indicative of the image, to a source driver.

2. The data transfer circuit as set forth in claim 1, wherein:

the information is indicative of the number of tones of the image; and

in a case where the determining device determines, based on the information, that the number of tones of the image has been decreased, the determining device sets the number of data lanes to a smaller number.

3. The data transfer circuit as set forth in claim 1, wherein:

the information is indicative of the number of tones of the image; and

in a case where the determining device determines, based on the information, that the number of tones of the image has been increased, the determining device sets the number of data lanes to a larger number.

4. The data transfer circuit as set forth in claim 1, wherein:

the information is indicative of the number of colors of the image; and

in a case where the determining device determines, based on the information, that the number of colors of the image has been decreased from the number of colors for a color display to the number of colors for a monochrome display, the determining device sets the number of data lanes to a smaller number.

5. The data transfer circuit as set forth in claim 1, wherein:

the information is indicative of the number of colors of the image; and

in a case where the determining device determines, based on the information, that the number of colors of the image has been increased from the number of colors for a monochrome display to the number of colors for a color display, the determining device sets the number of data lanes to a larger number.

6. The data transfer circuit as set forth in claim 1, wherein:

the information is indicative of a refresh frequency of the display panel; and

in a case where the determining device determines, based on the information, that the refresh frequency has been decreased, the determining device sets the number of data lanes to a smaller number.

7. The data transfer circuit as set forth in claim 1, wherein:

the information is indicative of a refresh frequency of the display panel; and

in a case where the determining device determines, based on the information, that the refresh frequency has been increased, the determining device sets the number of data lanes to a larger number.

8. A data transfer circuit as set forth in claim 1, further comprising:

a clock lane,

the deactivating device is arranged to more preferentially deactivate a data lane, which is located farther from the clock lane, out of the plurality of data lanes.

9. The data transfer circuit as set forth in claim 1, wherein:

an additional data transfer circuit is provided in a host-side device that is connected with the display device; and

said additional data transfer circuit serves as a graphic controller arranged to transfer data, which is indicative of the image, to the timing controller included in the display device.

10. A display device comprising a data transfer circuit recited in claim 9.

11. A display device comprising:

a data transfer circuit recited in claim 1; and

a performance lowering device arranged to lower a performance of an output circuit that is provided in the source driver and to supply supplies an analog voltage to the display panel during the halt period.

12. A host-side device comprising a data transfer circuit recited in claim 9.

13. An electronic apparatus comprising:

the display device of claim 11; and

a host-side device, and

the host-side device including an additional data transfer circuit, the additional data transfer circuit serving as a graphic controller arranged to transfer data, which is indicative of the image, to the timing controller.

14. An electronic apparatus comprising:

the display device of claim 1; and

an input device, and

the input device including a touch panel and a sensing device which (i) refrains from carrying out sensing of the touch panel during the transfer period and (ii) carries out sensing of the touch panel during the halt period.

15. The electronic apparatus as set forth in claim 14, wherein:

the touch panel is a capacitance touch panel or an electromagnetic induction touch panel.

16. A method for transferring data with use of at least one of a plurality of data lanes, said method comprising the steps of:

determining, based on information in relation to an amount of data to be transferred during a predetermined time period, the number of data lanes via which the data is transferred;

transferring the data with use of a determined number of data lane(s), which number has been determined in the determining step, out of the plurality of data lanes; and

deactivating a data lane(s), which is not used to transfer the data, out of the plurality of data lanes, wherein

the data is indicative of an image to be displayed on a display panel,

one vertical period to display the image being (i) a transfer period during which the data is transferred to a receiver circuit or (ii) a halt period during which the data is not transferred,

the information defines the transfer period and the halt period, and

in the determining step, the number of data lanes being set to zero during the halt period, and

said method for transferring the data is performed by a display device and serves to control timing to transfer data, which is indicative of the image, to a source driver.