Light emitting device and fabrication method thereof

• US 8,735,185 B2
• Filed: 08/14/2013
• Issued: 05/27/2014
• Est. Priority Date: 12/28/2006
• Status: Active Grant

• Current Assignee: Seoul Viosys Co., Ltd. (Seoul Semiconductor Co., Ltd.)
• Original Assignee: Seoul Optodevice Company Limited (Seoul Semiconductor Co., Ltd.)
• Inventors: Yoon, Yeo Jin, Kim, Chang Yeon
• Primary Examiner(s): Nguyen, Khiem D
• Application Number:
  US13/967,019
• Publication Number:
  US 20130330866A1
• Time in Patent Office: 286 Days
• Field of Search: 257/82, 257/86, 257/90, 257/98, 257/E33.001, 438/22, 438/29, 438/669
• US Class Current: 438/22
• CPC Class Codes: H01L 21/28 Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268 etching for patterning the electrodes H01L21/311, H01L21/3213; multistep manufacturing processes for data storage electrodes H01L29/4011
• CPC Class Codes: H01L 21/306 Chemical or electrical treatment, e.g. electrolytic etching to form insulating layers H01L21/31
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers
• CPC Class Codes: H01L 33/60 Reflective elements

Abstract

The present invention relates to a method of fabricating a patterned substrate for fabricating a light emitting diode (LED), the method including forming an aluminum layer on a substrate, forming an anodic aluminum oxide (AAO) layer having a large number of holes formed therein by performing an anodizing treatment of the aluminum layer, partially etching a surface of the substrate using the aluminum layer with the large number of the holes as a shadow mask, thereby forming patterns, and removing the aluminum layer from the substrate.

Claims

1. A method of fabricating a vertical light emitting diode (LED), comprising:

forming a low doped first conductive semiconductor layer on a sacrificial substrate;

forming an aluminum layer on a surface of the low doped first conductive semiconductor layer;

forming an anodic aluminum oxide (AAO) layer having a plurality of holes formed therein by performing an anodizing treatment of the aluminum layer;

etching and patterning the low doped first conductive semiconductor layer using the aluminum layer with the plurality of the holes as a shadow mask to expose a portion of the low doped first conductive semiconductor layer, thereby forming a plurality of grooves;

removing the aluminum layer from the low doped first conductive semiconductor layer;

sequentially forming a high doped first conductive semiconductor layer, an active layer and a second conductive semiconductor layer on the low doped first conductive semiconductor layer with the plurality of the grooves;

forming a metal reflective layer and a conductive substrate on the second conductive semiconductor layer;

separating the sacrificial substrate from the low doped first conductive semiconductor layer; and

forming an electrode pad on the other surface of the low doped first conductive semiconductor layer, the electrode pad being filled in a plurality of the grooves to be in ohmic contact with the high doped first conductive semiconductor layer.

2. The method of claim 1, wherein the doping concentration of dopant in the high doped first conductive semiconductor layer is 5 to 9×

10¹⁸/cm³, and the doping concentration of dopant in the low doped first conductive semiconductor layer is below 5×

10¹⁸/cm³.