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Motor drive circuit and illumination apparatus

  • US 8,736,214 B2
  • Filed: 03/23/2011
  • Issued: 05/27/2014
  • Est. Priority Date: 03/24/2010
  • Status: Expired due to Fees
First Claim
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1. A motor drive circuit, comprising:

  • an output transistor configured to supply a drive current to a drive coil of a motor configured to cause a fan to rotate so as to blow air to cool an object to be cooled;

    a switching control circuit configured to control switching of the output transistor so that the motor rotates in a first direction to cool the object to be cooled, or rotates in a second direction opposite to the first direction;

    a switching circuitconfigured to, when a first time has elapsed since start of rotation of the motor in the first direction, cause the switching control circuit to start switching control so that the motor stops rotating in the first direction and thereafter rotates in the second direction, andconfigured to, when a second time has elapsed since start of rotation of the motor in the second direction, cause the switching control circuit to start switching control so that the motor stops rotating in the second direction and thereafter rotates in the first direction,the switching control circuit includinga pulse width modulation circuit configured to generate a pulse width modulation signal, whose duty is increased in a gradual manner until reaching a predetermined duty ratio, in a case where switching control is started so that the motor rotates in the first direction or in the second direction, the predetermined duty ratio indicating a target rotating speed of the motor, whereinthe pulse width modulation circuit includes;

    a frequency dividing circuit configured to be inputted with a first clock signal having a 1/2 duty ratio, frequency-divide the first clock signal, and output one or more second clock signals each of which has a period 2n times (n representing natural number) as long as a period of the first clock signal, and whereinthe pulse width modulation circuit generates, based on the first and the second clock signals, the pulse width modulation signal whose duty ratio is increased by 1/2n+1 each; and

    a switching signal generating circuit configured to generate a switching signal according to the pulse width modulation signal, to be supplied to the output transistor.

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