Apparatus, system, and method for reconfiguring an array of storage elements

• US 8,738,991 B2
• Filed: 05/31/2013
• Issued: 05/27/2014
• Est. Priority Date: 05/18/2009
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Fusion-IO Incorporated (Western Digital Corporation)
• Inventors: Flynn, David, Thatcher, Jonathan, Aune, Joshua, Fillingim, Jeremy, Strasser, John, Vigor, Kevin, Inskeep, Bill
• Primary Examiner(s): ABRAHAM, ESAW T
• Application Number:
  US13/907,479
• Publication Number:
  US 20140095959A1
• Time in Patent Office: 361 Days
• Field of Search: 714/758, 714/770, 714/799
• US Class Current: 714/758
• CPC Class Codes: G06F 11/073 in a memory management context, e.g. virtual memory or cache management memory management G06F12/00; testing of static memory units G11C29/00
• CPC Class Codes: G06F 11/0766 Error or fault reporting or storing
• CPC Class Codes: G06F 11/108 Parity data distribution in semiconductor storages, e.g. in SSD
• CPC Class Codes: G06F 11/1092 Rebuilding, e.g. when physically replacing a failing disk
• CPC Class Codes: G06F 11/1096 Parity calculation or recalculation after configuration or reconfiguration of the system
• CPC Class Codes: H03M 13/09 Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit

Abstract

Apparatuses, systems, and methods are disclosed for reconfiguring an array of storage elements. A storage element error module is configured to determine that one or more storage elements in an array of storage elements are in error. An array of storage elements stores a first ECC block and first parity data generated from the first ECC block. A data reconfiguration module is configured to generate a second ECC block comprising at least a portion of data of a first ECC block. A new configuration storage module is configured to store a second ECC block and associated second parity data on fewer storage elements than a number of storage elements in an array.

Claims

1. An apparatus comprising:

a storage element error module configured to determine that one or more solid-state storage elements of a plurality of storage elements in a storage device are in error, wherein the one or more storage elements in error are configured to store at least a portion of one or both of a first ECC block and first parity data generated from the first ECC block;

a data reconfiguration module configured to generate a second ECC block comprising at least a portion of data of the first ECC block;

a new configuration storage module configured to store at least a portion of one or both of the second ECC block and associated second parity data on a different storage element of the plurality of storage elements than the one or more storage elements that stored at least a portion of one or both of the first ECC block and the first parity data; and

wherein the storage element error module, the data reconfiguration module, and the new configuration storage module comprise one or more of logic hardware and a non-transitory computer readable medium having executable code stored thereon.

2. The apparatus of claim 1, further comprising a data regeneration module configured to regenerate data from the first ECC block using the first parity data.

3. The apparatus of claim 2, wherein the data regeneration module is further configured to regenerate data from the first parity data using the first ECC block.

4. The apparatus of claim 1, further comprising a reconfiguration log module configured to identify one or more regions in the plurality of storage elements where data is stored.

5. The apparatus of claim 4, wherein the reconfiguration log module is configured to track a storage region that is unavailable for data storage such that data is stored on fewer storage elements in the unavailable storage region than in the locations outside the unavailable region.

6. The apparatus of claim 4, wherein the region comprises one or more of a portion of a logical page, a logical page, a group of logical pages, a portion of an erase block, a group of erase blocks, one or more dies, and one or more chips.

7. The apparatus of claim 1, wherein the storage element error module is configured to determine that the one or more storage elements are in error using a plurality of ECC blocks.

8. The apparatus of claim 1, wherein the data reconfiguration module is configured to operate in a background garbage collection process.

9. The apparatus of claim 1, wherein data is stored sequentially to an append point for the plurality of storage elements, and wherein the new configuration storage module is configured to store the second ECC block and second parity data at the append point.

10. The apparatus of claim 1, wherein the first and the second ECC blocks include the same user data.

11. The apparatus of claim 1, wherein the plurality of storage elements includes a first storage element and a second storage element, wherein the first storage element stores the first ECC block, and wherein the second storage element stores the first parity data.

12. The apparatus of claim 11, wherein the plurality of storage elements includes a third storage element, and wherein the third storage element stores the second ECC block.

13. The apparatus of claim 1, wherein the plurality of storage elements includes a first storage element, a second storage element, and a third storage element, wherein the first ECC block is stored on the first storage element and the second storage element, and wherein the second ECC block is stored on the second storage element and the third storage element.

14. The apparatus of claim 1, wherein the new configuration storage module is configured to store the second ECC block on a first storage element, and wherein the first storage element is different than a storage element on which the first ECC block is stored.

15. The apparatus of claim 1, wherein the new configuration storage module is configured to store the second ECC block on at least a first storage element and a second storage element.

16. The apparatus of claim 1, wherein the new configuration storage module is configured to store the second parity data on a first storage element.

17. An apparatus comprising:

a data regeneration module configured to regenerate missing data of a first ECC chunk using first parity data generated for the first ECC chunk, wherein the data regeneration module is configured to regenerate the missing data in response to one or more storage elements of a plurality of storage elements in a storage device being unavailable to store data, wherein the one or more storage elements are configured to store at least one of the first ECC chunk and the first parity data;

a data reconfiguration module configured to generate a second ECC chunk from one or more of available portions of the first ECC chunk and the regenerated data;

a new configuration storage module configured to store at least one of the second ECC chunk and associated second parity data on a different storage element of the plurality of storage elements than one or more storage elements that stored the first ECC chunk; and

wherein the data regeneration module, the data reconfiguration module, and the new configuration storage module comprise one or more of logic hardware and a non-transitory computer readable medium having executable code stored thereon.

18. The apparatus of claim 17, further comprising a data regeneration module configured to conduct parity computations on data stored in one or more of the storage elements storing the first ECC chunk and on the first parity data in one or more storage elements storing the first parity data, the parity computations identifying the one or more unavailable storage elements.

19. The apparatus of claim 17, wherein the plurality of storage elements comprises N number of storage elements storing the first ECC chunk and P number of storage elements storing the first parity data generated from the first ECC chunk, and the second ECC chunk and associated second parity data are stored on (N+P)−

Z storage elements where 1≦

Z≦

P.

20. A method comprising:

storing a first ECC block and first parity data generated for the first ECC block on one or more of a plurality of solid-state storage elements of a storage device;

determining that one or more storage elements storing at least a portion of one or both of the first ECC block and the first parity data are in error;

generating a second ECC block comprising at least a portion of data of the first ECC block; and

storing at least one of the second ECC block and second parity data for the second ECC block at least partially on a different storage element of the plurality of storage elements than stored the first ECC block.