Microchips with an internal hardware firewall protected portion and a network portion with microprocessors which execute shared processing operations with the network

• US 8,739,195 B2
• Filed: 01/28/2011
• Issued: 05/27/2014
• Est. Priority Date: 11/29/1996
• Status: Expired due to Fees

• Current Assignee: Frampton E. Ellis III
• Original Assignee: Frampton E. Ellis III
• Inventors: Ellis, Frampton E. III
• Primary Examiner(s): STRANGE, AARON N
• Application Number:
  US13/016,149
• Publication Number:
  US 20120030747A1
• Time in Patent Office: 1,215 Days
• Field of Search: 709/201, 709/220, 709/250, 726/11
• US Class Current: 725/11
• CPC Class Codes: G06F 21/70 Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
• CPC Class Codes: G06F 21/74 operating in dual or compartmented mode, i.e. at least one secure mode
• CPC Class Codes: G06F 9/5072 Grid computing
• CPC Class Codes: G06F 9/5077 Logical partitioning of resources; Management or configuration of virtualized resources specific details on emulation or internal functioning of virtual machines G06F9/455
• CPC Class Codes: G06Q 30/04 Billing or invoicing
• CPC Class Codes: G06Q 50/00 Information and communication technology [ICT] specially adapted for implementation of business processes of specific business sectors, e.g. utilities or tourism healthcare informatics G16H
• CPC Class Codes: H04L 41/046 comprising network management agents or mobile agents therefor
• CPC Class Codes: H04L 63/02 for separating internal from external traffic, e.g. firewalls
• CPC Class Codes: H04L 63/0209 Architectural arrangements, e.g. perimeter networks or demilitarized zones
• CPC Class Codes: H04L 67/10 in which an application is distributed across nodes in the network software deployment G06F8/60; multiprogramming arrangements G06F9/46

Abstract

A microchip, comprising an internal hardware firewall located between a protected portion of the microchip protected by the internal hardware firewall and a network portion configured to communicate with a network of computers located between the internal hardware firewall and a connection of the microchip to the network. The microchip also includes one or more microprocessors located in the network portion and separate from network communications components; and the microprocessors located in the network portion and the network communications components being separate from the firewall. The firewall is configured by its location to permit unrestricted access by the network to the network portion, and one or more shared processing operations conducted by the microchip with the network are executed at least by one or many microprocessors located in the network portion.

Claims

1. A microchip configured for a computer, said microchip, comprising:

at least one internal hardware firewall located between a protected portion of said microchip protected by said at least one internal hardware firewall and a network portion of said microchip, said network portion being configured to communicate with a network of computers including the World Wide Web and/or the Internet;

network communications components located in said network portion of said microchip;

said at least one internal hardware firewall is configured to deny access to said protected portion from communications originating from said network of computers;

said network portion of said microchip being located between said at least one internal hardware firewall and a connection of said microchip to said network of computers;

one or more or at least two or four or eight or 14 or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors located in said network portion of said microchip;

said one or more microprocessors located in said network portion being separate from said network communications components;

said one or more microprocessors located in said network portion and said network communications components being separate from said at least one internal hardware firewall;

said at least one internal hardware firewall is configured by its location to permit unrestricted access by said network of computers to said network portion of said microchip, and

wherein one or more shared processing operations conducted by said microchip with the network of computers is executed by said microchip at least by one or more said microprocessors located in said network portion of the microchip.

2. The microchip of claim 1, further comprising at least one microprocessor located in said protected portion of said microchip;

and

said at least one microprocessor located in said protected portion is separate from said at least one internal hardware firewall and said at least one internal hardware firewall is also configured to deny access by the network of computers to said at least one microprocessor located in said protected portion.

3. The microchip of claim 2, wherein one said microprocessor includes a master controlling device for the microchip and is located in said protected portion.

4. The microchip of claim 1, wherein at least two or four or six or eight or 14 or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors are located in said network portion of said microchip and are separate from said at least one internal hardware firewall.

5. The microchip of claim 1, further comprising at least one flash memory component located in said protected portion of the microchip and said at least one flash memory component is separate from said at least one internal hardware firewall.

6. The microchip of claim 1, wherein the microprocessor configured to be a master controlling device of said microchip is located in said protected portion of said microchip.

7. The microchip of claim 1, further comprising a microprocessor configured to be a master controlling device of said computer.

8. A microchip configured for a computer, said microchip comprising:

at least one internal hardware firewall located between a protected portion of said microchip protected by said at least one internal hardware firewall and a network portion of said microchip, said network portion being configured to connect to a network of computers;

said network portion of said microchip located between said at least one internal hardware firewall and a connection of said computer to said network of computers;

at least one graphics component located in said network portion of the microchip;

one or more or at least two or four or eight or 14 or 16 or 32 or 64 or 128 or 256 or 512 or 1024 processing units located in said network portion of the microchip, and said one or more processing units and said at least one graphics component being separate from each other and are each separate from said at least one internal hardware firewall.

9. The microchip of claim 8, further comprising at least one processing unit located in said protected portion of said microchip;

and

said at least one processing unit located in said protected portion being separate from said at least one internal hardware firewall, and

wherein said at least one internal hardware firewall is also configured to deny access by the network of computers to said at least one processing unit located in said protected portion.

10. The microchip of claim 9, wherein at least one said processing unit located in said protected portion includes a master controlling device for the microchip.

11. The microchip of claim 10, wherein at least two or four or eight or 14 or 16 or 32 or 64 or 128 or 256 or 512 or 1024 processing units are located in said network portion of said microchip and are separate from said at least one internal hardware firewall.

12. The microchip of claim 8, further comprising at least one network communications component located in said network portion of the microchip and said at least one network communications component is separate from said at least one internal hardware firewall and said at least one graphics component.

13. The microchip of claim 9, further comprising at least one video component located in said network portion of the microchip and said at least one video

14. The microchip of claim 9, further comprising at least one sound component located in said network portion of the microchip and said at least one sound component is separate from said at least one internal hardware firewall and said at least one graphics component.

15. The microchip of claim 9, further comprising at least one flash memory component located in said network portion of the microchip and said at least one flash memory component is separate from said at least one internal hardware firewall and said at least one graphics component.

16. The microchip of claim 8, wherein said at least one internal hardware firewall is configured by its location to permit unrestricted access by said network to said one or more processing units located in said network portion of said microchip, and wherein said microchip is configured to at least perform Internet browsing with the network of computers, and said Internet browsing is executed at least by one or more said processing units located in said network portion of the microchip.

17. The microchip of claim 8, wherein said at least one internal hardware firewall is configured to deny access to at least said protected portion of said microchip from said network.

18. A microchip configured for a computer that is configured for connection to a network of computers, said microchip comprising:

at least one internal hardware firewall located between a protected portion of said microchip protected by said at least one internal hardware firewall and a network portion of said microchip;

said network portion of said microchip being located between said at least one internal hardware firewall and a connection of said computer to said network of computers;

one or more or at least two or four or eight or 14 or 16 or 32 or 64 or 128 or 256 or 512 or 1024 processing units of the microchip located in said network portion of said microchip; and

said one or more processing units located in said network portion are separate from said at least one internal hardware firewall

said at least one internal hardware firewall is configured to permit unrestricted access by said network of computers to said one or more processing units located in said network portion of said microchip, and wherein said microchip is configured to at least perform Internet browsing with the network of computers, and said Internet browsing is executed at least by one or more said processing units located in said network portion of the microchip.

19. The microchip of claim 18, wherein said browsing is selected from the group consisting of World Wide Web or Internet searching, email and conferencing.

20. The microchip of claim 18, wherein said at least one internal hardware firewall is configured to deny access to at least said protected portion of said microchip from said network.

21. A microchip configured for a computer that is configured for connection to a network of computers, said microchip comprising:

at least one internal hardware firewall located between a protected portion of said microchip protected by said at least one internal hardware firewall and a network portion of said microchip;

said network portion of said microchip being located between said at least one internal hardware firewall and a connection of said computer to said network of computers;

one or more or at least two or four or eight or 14 or 16 or 32 or 64 or 128 or 256 or 512 or 1024 processing units of the microchip located in said network portion of said microchip; and

at least one field programmable gate array; and

wherein

said one or more processing units are separate from said at least one internal hardware firewall

said at least one internal hardware firewall is configured to permit unrestricted access by said network of computers to said one or more processing units located in said network portion of said microchip, and

wherein one or more shared processing operations conducted by said microchip with the network of computers are executed at least by one or more said processing units located in said network portion of the microchip.

22. The microchip of claim 21, wherein said at least one internal hardware firewall is configured at least in part by said at least one field programmable gate array.

23. The microchip of claim 21, wherein said at least one internal hardware firewall is configured to deny access to at least said protected portion of said microchip from said network.

24. A microchip configured for a computer, said microchip, comprising:

at least one internal hardware firewall located between a protected portion of said microchip protected by said at least one internal hardware firewall and a network portion of said microchip, said network portion being configured to communicate with a network of computers including the World Wide Web and/or the Internet;

network communications components located in said network portion of said microchip;

said at least one internal hardware firewall is configured to deny access to at least said protected portion from communications originating from said network of computers;

said network portion of said microchip being located between said at least one internal hardware firewall and a connection of said microchip to said network of computers;

one or more or at least two or four or eight or 14 or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors located in said network portion of said microchip; and

said one or more microprocessor located in said network portion being separate from said network communications components;

said one or more microprocessors located in said network portion and said network communications components being separate from said at least one internal hardware firewall;

said at least one internal hardware firewall is configured by its location to permit unrestricted access by said network of computers to said network portion of said microchip, and

wherein computer microchip initiates a request to said network of computers for execution of one or more shared processing operations conducted by said microchip with the network of computers that are executed at least by one or more said microprocessors located in said network portion of the microchip.

25. The microchip of claim 24, further comprising a microprocessor configured to be a master controlling device of said microchip.

26. The microchip of claim 24, further comprising a microprocessor configured to be a master controlling device of said microchip located in said protected portion of said microchip.

27. A microchip configured for a computer, said microchip, comprising:

at least one internal hardware firewall located between a protected portion of said microchip protected by said at least one internal hardware firewall and a network portion of said microchip, said network portion being configured to connect to a network of computers including the World Wide Web and/or the Internet;

a microprocessor configured to be a master controlling device of said microchip;

network communications components located in said network portion of said microchip;

said at least one internal hardware firewall is configured to deny access to at least said protected portion from communications originating from said network of computers;

said network portion of said microchip being located between said at least one internal hardware firewall and a connection of said microchip to said network of computers;

one or more or at least two or four or eight or 14 or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors located in said network portion of said microchip; and

said one or more microprocessors located in said network portion being separate from said network communications components;

said one or more microprocessors located in said network portion and said network communications components being separate from said at least one internal hardware firewall;

said at least one internal hardware firewall is configured by its location to permit unrestricted access by said network to said one or more microprocessors located in said network portion of said microchip, and

wherein said microchip is configured to perform World Wide Web or Internet browsing with the network of computers and processing performed by the microchip for said World Wide Web or Internet browsing with the network of computers is executed at least by one or more said microprocessors located in said network portion of the microchip.

28. The microchip of claim 27, wherein said browsing is selected from the group consisting of World Wide Web or Internet searching, email and conferencing.

29. The microchip of claim 27, wherein the microprocessor configured to be a master controlling device of said microchip is located in said protected portion of said microchip.

30. A microchip configured for a computer, said microchip, comprising:

at least one internal hardware firewall located between a protected portion of said microchip protected by said at least one internal hardware firewall and a network portion of said microchip, said network portion being configured to communicate with a network of computers including the World Wide Web and/or the Internet;

network communications components located in said network portion of said microchip;

said at least one internal hardware firewall is configured to deny access to at least said protected portion from communications originating from said network of computers;

said network portion of said microchip being located between said at least one internal hardware firewall and a connection of microchip to said network of computers;

one or more or at least two or four or eight or 14 or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors located in said network portion of said microchip; and

said one or more microprocessor located in said network portion being separate from said network communications components;

said one or more microprocessors located in said network portion and said network communications components being separate from said at least one internal hardware firewall;

said at least one internal hardware firewall is configured by its location to permit unrestricted access by said network of computers to said network portion of said microchip, and

wherein said microchip is configured to function as a node in a computer system with many such nodes in which one or more shared processing operations conducted by said microchip with the network of computers are executed at least by one or more said microprocessors located in said network portion of the microchip.

31. The microchip of claim 30, further comprising a microprocessor configured to be a master controlling device of said microchip.

32. The microchip of claim 30, further comprising a microprocessor configured to be a master controlling device of said microchip located in said protected portion of said microchip.

33. A microchip configured for a computer, said microchip, comprising:

at least one internal hardware firewall located between a protected portion of said microchip protected by said at least one internal hardware firewall and a network portion of said microchip, said network portion being configured to include network communications components;

said at least one internal hardware firewall is configured to deny access to at least said protected portion from communications originating from said network of computers;

said network portion of said microchip being located between said at least one internal hardware firewall and a connection of said microchip to said network of computers;

one or more or at least two or four or eight or 14 or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors located in said network portion of said microchip; and

said one or more microprocessor located in said network portion being separate from said network communications components;

said one or more microprocessors located in said network portion and said network communications components being separate from said at least one internal hardware firewall;

said at least one internal hardware firewall is configured by its location to permit unrestricted access by said network of computers to said network portion of said microchip, and

wherein one or more shared processing operations initiated by said microchip with the network of computers are executed at least by one or more said microprocessors located in said network portion of the microchip.

34. The microchip of claim 33, further comprising a microprocessor configured to be a master controlling device of said microchip.

35. The microchip of claim 33, further comprising a microprocessor configured to be a master controlling device of said microchip located in said protected portion of said microchip.

36. A microchip configured for a computer, said microchip, comprising:

at least one internal hardware firewall located between a protected portion of said microchip protected by said at least one internal hardware firewall and a network portion of said microchip, said network portion being configured to communicate with a network of computers including the World Wide Web and/or the Internet;

network communications components located in said network portion of said microchip;

said at least one internal hardware firewall is configured to deny access to at least said protected portion from communications originating from said network of computers;

said network portion of said microchip being located between said at least one internal hardware firewall and a connection of said computer microchip to said network of computers;

one or more or at least two or four or eight or 14 or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors located in said network portion of said computer microchip; and

said one or more microprocessor located in said network portion being separate from said hardware network communications components;

said one or more microprocessors located in said network portion and said network communications components being separate from said at least one internal hardware firewall;

said at least one internal hardware firewall is configured by its location to permit unrestricted access by said network of computers to said network portion of said microchip, and

wherein one or more search operations initiated by said microchip with the network of computers are executed at least by one or more said microprocessors located in said network portion of the microchip.

37. The microchip of claim 36, further comprising a microprocessor configured to be a master controlling device of said microchip.

38. The microchip of claim 36, further comprising a microprocessor configured to be a master controlling device of said computer microchip located in said protected portion of said microchip.