Method for manufacturing semiconductor device

• US 8,741,702 B2
• Filed: 10/20/2009
• Issued: 06/03/2014
• Est. Priority Date: 10/24/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Ito, Shunichi, Hosoba, Miyuki, Suzawa, Hideomi, Sasagawa, Shinya, Muraoka, Taiga
• Primary Examiner(s): Nhu, David
• Application Number:
  US12/582,079
• Publication Number:
  US 20100105163A1
• Time in Patent Office: 1,687 Days
• Field of Search: 438/149, 438/141, 438/91, 438/197, 438/257, 438/509, 438/513, 438/474, 438/475, 438/680, 438/706, 438/733, 257/E21.006, 257/E21.051, 257/E21.053, 257/E21.077, 257/E21.227, 257/E21.245, 257/E21.267, 257/E21.311, 257/E21.321, 257/E21.352
• US Class Current: 438/149
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by dry etching in which an etching gas is used, and a second etching step is performed by wet etching in which an etchant is used.

Claims

1. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

a first oxide semiconductor film over the gate insulating layer, the first oxide semiconductor film comprising oxygen and a metal; and

a source electrode layer and a drain electrode layer over the first oxide semiconductor film, each of the source electrode layer and the drain electrode layer including an inner edge opposed to each other,

wherein the first oxide semiconductor film comprises a first region overlapping with the inner edge of the source electrode layer, a second region overlapping with the inner edge of the drain electrode layer, and a third region between the first region and the second region,

wherein a thickness of the third region is thinner than those of the first region and the second region,

wherein the third region comprises a slanted surface adjacent to one of the inner edges of the source electrode layer and the drain electrode layer, and

wherein a taper angle of the slanted surface is smaller than one of taper angles of the inner edges of the source electrode layer and the drain electrode layer.

2. The semiconductor device according to claim 1, further comprising:

a second oxide semiconductor film between the first oxide semiconductor film and the source electrode layer; and

a third oxide semiconductor film between the first oxide semiconductor film and the drain electrode layer.

3. The semiconductor device according to claim 1,

wherein the first oxide semiconductor film is in contact with the source electrode layer and the drain electrode layer.

4. The semiconductor device according to claim 1,

wherein the slanted surface is curved.

5. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

a first oxide semiconductor film over the gate insulating layer, the first oxide semiconductor film comprising oxygen and a metal; and

a source electrode layer and a drain electrode layer over the first oxide semiconductor film, each of the source electrode layer and the drain electrode layer including an inner edge opposed to each other,

wherein the first oxide semiconductor film comprises a first region overlapping with the inner edge of the source electrode layer, a second region overlapping with the inner edge of the drain electrode layer, and a third region between the first region and the second region,

wherein a thickness of the third region is thinner than those of the first region and the second region, and

wherein the third region comprises a curved surface.

6. The semiconductor device according to claim 5, further comprising:

a second oxide semiconductor film between the first oxide semiconductor film and the source electrode layer; and

a third oxide semiconductor film between the first oxide semiconductor film and the drain electrode layer.

7. The semiconductor device according to claim 5,

wherein the first oxide semiconductor film is in contact with the source electrode layer and the drain electrode layer.

8. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

a first oxide semiconductor film over the gate insulating layer, the first oxide semiconductor film comprising oxygen and a metal; and

a source electrode layer and a drain electrode layer over the first oxide semiconductor film, each of the source electrode layer and the drain electrode layer including an inner edge opposed to each other,

wherein the first oxide semiconductor film comprises a first region overlapping with the inner edge of the source electrode layer, a second region overlapping with the inner edge of the drain electrode layer, and a third region between the first region and the second region,

wherein a thickness of the third region is thinner than those of the first region and the second region,

wherein the third region comprises a slanted surface adjacent to one of the inner edges of the source electrode layer and the drain electrode layer,

wherein a taper angle of the slanted surface is smaller than one of taper angles of the inner edges of the source electrode layer and the drain electrode layer, and

wherein at least one of an outer edge of the source electrode layer, an outer edge of the drain electrode layer, and an outer edge of the first oxide semiconductor film comprise a curved surface.

9. The semiconductor device according to claim 8, further comprising:

a second oxide semiconductor film between the first oxide semiconductor film and the source electrode layer; and

a third oxide semiconductor film between the first oxide semiconductor film and the drain electrode layer.

10. The semiconductor device according to claim 8,

wherein the first oxide semiconductor film is in contact with the source electrode layer and the drain electrode layer.

11. The semiconductor device according to claim 8,

wherein the slanted surface is curved.

12. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

a first oxide semiconductor film over the gate insulating layer, the first oxide semiconductor film comprising oxygen and a metal;

a source electrode layer and a drain electrode layer over the first oxide semiconductor film, each of the source electrode layer and the drain electrode layer including an inner edge opposed to each other; and

an insulating film covering the source electrode layer, the drain electrode layer, and the first oxide semiconductor film,

wherein the first oxide semiconductor film comprises a first region overlapping with the inner edge of the source electrode layer, a second region overlapping with the inner edge of the drain electrode layer, and a third region between the first region and the second region,

wherein a thickness of the third region is thinner than those of the first region and the second region,

wherein the third region comprises a slanted surface adjacent to one of the inner edges of the source electrode layer and the drain electrode layer,

wherein a taper angle of the slanted surface is smaller than one of taper angles of the inner edges of the source electrode layer and the drain electrode layer, and

wherein the insulating film is in contact with the third region.

13. The semiconductor device according to claim 12, further comprising:

a second oxide semiconductor film between the first oxide semiconductor film and the source electrode layer; and

a third oxide semiconductor film between the first oxide semiconductor film and the drain electrode layer.

14. The semiconductor device according to claim 12,

wherein the first oxide semiconductor film is in contact with the source electrode layer and the drain electrode layer.

15. The semiconductor device according to claim 12,

wherein the slanted surface is curved.

16. The semiconductor device according to claim 12,

wherein the insulating film comprises oxygen and silicon.

17. The semiconductor device according to claim 12,

wherein the insulating film comprises nitrogen and silicon.

18. The semiconductor device according to claim 12,

wherein the insulating film comprises oxygen, nitride, and silicon.

19. The semiconductor device according to claim 12,

wherein the first oxide semiconductor film comprises indium, gallium, and zinc.

20. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

a first oxide semiconductor film over the gate insulating layer, the first oxide semiconductor film comprising oxygen and a metal;

a source electrode layer and a drain electrode layer over the first oxide semiconductor film, each of the source electrode layer and the drain electrode layer including an inner edge opposed to each other; and

an insulating film covering the source electrode layer, the drain electrode layer, and the first oxide semiconductor film,

wherein the first oxide semiconductor film comprises a first region overlapping with the inner edge of the source electrode layer, a second region overlapping with the inner edge of the drain electrode layer, and a third region between the first region and the second region,

wherein a thickness of the third region is thinner than those of the first region and the second region,

wherein the third region comprises a slanted surface adjacent to one of the inner edges of the source electrode layer and the drain electrode layer,

wherein a taper angle of the slanted surface is smaller than one of taper angles of the inner edges of the source electrode layer and the drain electrode layer,

wherein at least one of an outer edge of the source electrode layer, an outer edge of the drain electrode layer, and an outer edge of the first oxide semiconductor film comprise a curved surface,

wherein the insulating film is in contact with the third region, and

wherein the insulating film is in contact with the outer edges of the source electrode layer, the drain electrode layer, and the first oxide semiconductor film.

21. The semiconductor device according to claim 20, further comprising:

a second oxide semiconductor film between the first oxide semiconductor film and the source electrode layer; and

a third oxide semiconductor film between the first oxide semiconductor film and the drain electrode layer.

22. The semiconductor device according to claim 20,

wherein the first oxide semiconductor film is in contact with the source electrode layer and the drain electrode layer.

23. The semiconductor device according to claim 20,

wherein the slanted surface is curved.

24. The semiconductor device according to claim 20,

wherein the insulating film comprises oxygen and silicon.

25. The semiconductor device according to claim 20,

wherein the insulating film comprises nitrogen and silicon.

26. The semiconductor device according to claim 20,

wherein the insulating film comprises oxygen, nitride, and silicon.

27. The semiconductor device according to claim 20,

wherein the first oxide semiconductor film comprises indium, gallium, and zinc.