Gate electrodes for millimeter-wave operation and methods of fabrication
First Claim
1. A method of fabricating a gate electrode on a semiconductor structure, comprising:
- depositing a resist layer that comprises an inner layer, a middle layer, and an outer layer on said semiconductor structure, said inner layer being the closest of any resist layers to said semiconductor structure and comprising a resist material different from the material of said middle layer, and said outer layer comprising a resist material different from the material of said middle layer;
removing selected portions of said resist layer in sequence starting with said outer layer, wherein a portion of said inner layer is removed such that a remaining portion of said inner layer defines sidewalls generally curving inward as they approach said semiconductor structure; and
depositing a conductive material in a space left after said removal of selected portions.
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Accused Products
Abstract
A transistor device having a tiered gate electrode fabricated with methods using a triple layer resist structure. The triple layer resist stack is deposited on a semiconductor structure. An exposure pattern is written onto the resist stack using an e-beam writer, for example. The exposure dose is non-uniform across the device. Portions of the three resist layers are removed with a sequential development process, resulting in tiered resist structure. A conductive material is deposited to form the gate electrode. The resulting “Air-T” gate also has a three-tiered structure. The fabrication process is well-suited for the production of gates small enough for use in millimeter wave devices.
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Citations
17 Claims
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1. A method of fabricating a gate electrode on a semiconductor structure, comprising:
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depositing a resist layer that comprises an inner layer, a middle layer, and an outer layer on said semiconductor structure, said inner layer being the closest of any resist layers to said semiconductor structure and comprising a resist material different from the material of said middle layer, and said outer layer comprising a resist material different from the material of said middle layer; removing selected portions of said resist layer in sequence starting with said outer layer, wherein a portion of said inner layer is removed such that a remaining portion of said inner layer defines sidewalls generally curving inward as they approach said semiconductor structure; and depositing a conductive material in a space left after said removal of selected portions. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A method of fabricating a gate electrode on a semiconductor structure, comprising:
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depositing a resist layer that comprises an inner layer, a middle layer, and an outer layer on said semiconductor structure, said inner layer being the closest of any resist layers to said semiconductor structure and comprising a resist material different from the material of said middle layer, and said outer layer comprising a resist material different from the material of said middle layer; removing selected portions of said resist layer in sequence starting with said outer layer, wherein a portion of said inner layer is removed such that a remaining portion of said inner layer defines sidewalls generally curving inward as they approach said semiconductor structure; depositing a conductive material in a space left after said removal of selected portions; after depositing said resist layer, exposing a pattern on said resist layer; developing at least a portion of said outer layer such that at least a portion of said middle layer is exposed; developing at least a portion of said middle layer such that a portion of said inner layer is exposed; wherein a portion of said middle layer is removed that is laterally beyond the edge of the remaining portion of said outer layer, forming an undercut feature; and developing at least a portion of said inner layer such that at least a portion of said semiconductor structure is exposed, such that the remaining portion of said inner layer defines said generally curved sidewalls; wherein said developing of said outer layer is done with a mix of methyl ethyl ketone and methyl isobutyl ketone (MEK;
MIBK), said developing of said middle layer is done with a tetramethylammonium hydroxide (TMAH) based developer, and said developing of said inner layer is done with amyl acetate.
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Specification